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AAT2601AIIH-3.3-T1 PDF预览

AAT2601AIIH-3.3-T1

更新时间： 2024-01-04 20:25:49
品牌 Logo 应用领域
思佳讯 - SKYWORKS 便携式
页数 文件大小 规格书
38页 4162K
描述
Total Power Solution for Portable Applications

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AAT2601AIIH-3.3-T1 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：QCCN, LCC36,.2SQ,16Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.71模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码：S-PQCC-N36端子数量：36
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：QCCN
封装等效代码：LCC36,.2SQ,16封装形状：SQUARE
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.6,5 V认证状态：Not Qualified
子类别：Power Management Circuits表面贴装：YES
温度等级：INDUSTRIAL端子形式：NO LEAD
端子节距：0.4 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIEDBase Number Matches：1

AAT2601AIIH-3.3-T1 数据手册

 浏览型号AAT2601AIIH-3.3-T1的Datasheet PDF文件第29页浏览型号AAT2601AIIH-3.3-T1的Datasheet PDF文件第30页浏览型号AAT2601AIIH-3.3-T1的Datasheet PDF文件第31页浏览型号AAT2601AIIH-3.3-T1的Datasheet PDF文件第33页浏览型号AAT2601AIIH-3.3-T1的Datasheet PDF文件第34页浏览型号AAT2601AIIH-3.3-T1的Datasheet PDF文件第35页 
DATA SHEET  
AAT2601/2601A  
Total Power Solution for Portable Applications  
Layout Guidance  
Timer  
Charger Watchdog Timer  
0
1
ON (default)  
OFF (and reset to zero)  
Figure 10 is the schematic for the evaluation board. The  
evaluation board has extra components for easy evalua-  
tion; the actual BOM need for a system is shown in Table  
9. When laying out the PC board, the following layout  
guideline should be followed to ensure proper operation  
of the AAT2601/AAT2601A:  
Table 6: Timer Bit Setting for  
the Charger Watchdog Timer.  
LDO11  
LDO10  
LDO1 Output Voltage  
1. The exposed pad EP must be reliably soldered to  
PGND/AGND and multilayer GND. The exposed ther-  
mal pad should be connected to board ground plane  
and pins 2 and 16. The ground plane should include  
a large exposed copper pad under the package with  
VIAs to all board layers for thermal dissipation.  
2. The power traces, including GND traces, the LX  
traces and the VIN trace should be kept short, direct  
and wide to allow large current flow. The L1 connec-  
tion to the LX pins should be as short as possible.  
Use several via pads when routing between layers.  
3. The input capacitors (C1 and C2) should be con-  
nected as close as possible to CHGIN (Pin 28) and  
PGND (Pin 2) to get good power filtering.  
0
0
1
1
0
1
0
1
3.00V (default)  
2.90V  
2.85V  
2.80V  
LDO21  
LDO20  
LDO2 Output Voltage  
0
0
1
1
0
1
0
1
3.00V (default)  
2.90V  
2.85V  
2.80V  
LDO31  
LDO30  
LDO3 Output Voltage  
0
0
1
1
0
1
0
1
3.00V (default)  
2.90V  
2.85V  
2.80V  
4. Keep the switching node LX away from the sensitive  
OUTBUCK feedback node.  
LDO41  
LDO40  
LDO4 Output Voltage  
0
0
1
1
0
1
0
1
3.00V (default)  
2.90V  
5. The feedback trace for the OUTBUCK pin should be  
separate from any power trace and connected as  
closely as possible to the load point. Sensing along a  
high current load trace will degrade DC load regula-  
tion.  
6. The output capacitor C4 and L1 should be connected  
as close as possible and there should not be any  
signal lines under the inductor.  
2.85V  
2.80V  
LDO51  
LDO50  
LDO5 Output Voltage  
0
0
1
1
0
1
0
1
3.00V (default)  
2.90V  
2.85V  
2.80V  
7. The resistance of the trace from the load return to  
the PGND (Pin 2) should be kept to a minimum. This  
will help to minimize any error in DC regulation due  
to differences in the potential of the internal signal  
ground and the power ground.  
Table 7: LDO Bit Setting for  
LDO Output Voltage Level.  
SYS Bit  
SYSOUT Power Source  
If USE_USB = H, SYSOUT powered from BAT  
If USE_USB = L, SYSOUT powered from CHGIN  
0
1
SYSOUT always powered from BAT  
Table 8: SYS Bit Setting for SYSOUT Power Path.  
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com  
32  
202179B  
• Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • March 19, 2013  
1...29303132333435...38

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