PRODUCT DATASHEET
AAT1160
SwitchRegTM
12V, 3A Step-Down DC/DC Converter
Short-Circuit Protection
Applications Information
The AAT1160 uses a cycle-by-cycle current limit to pro-
tect itself and the load from an external fault condition.
When the inductor current reaches the internally set
6.0A current limit, the P-channel MOSFET switch turns
off and the N-channel synchronous rectifier is turned on,
limiting the inductor and the load current.
Setting the Output Voltage
Figure 1 shows the basic application circuit for the
AAT1160 and output setting resistors. Resistors R3 and
R6 program the output to regulate at a voltage higher
than 0.6V. To limit the bias current required for the
external feedback resistor string while maintaining good
noise immunity, the minimum suggested value for R6 is
5.9kΩ. Although a larger value will further reduce quies-
cent current, it will also increase the impedance of the
feedback node, making it more sensitive to external
noise and interference. Table 1 summarizes the resistor
values for various output voltages with R6 set to either
5.9kΩ for good noise immunity or 59kΩ for reduced no
load input current.
During an overload condition, when the output voltage
drops below 25% of the regulation voltage (0.15V at
FB), the AAT1160 switching frequency drops by a factor
of 4. This gives the inductor current ample time to reset
during the off time to prevent the inductor current from
rising uncontrolled in a short-circuit condition.
Thermal Protection
The AAT1160 includes thermal protection that disables
the regulator when the die temperature reaches 140ºC.
It automatically restarts when the temperature decreas-
es by 25ºC or more.
L1
EP2
VOUT
5V, 2A
VIN 4.5V -13 .2V
R4
3.8μH
LX
3
4
1
2
LX
LX
FB
EN
IN
C3, C4
2x22μF
C1
R3
10Ω
5
7
C6
22μF
100pF
43.2kΩ
C2
0.1μF
IN
9
AAT1160
R6
AIN
10
11
C8
1μF
COMP
Frequency Synchronization
5.9kΩ
6
13
16
AGND
DGND
R5
50kΩ
The AAT1160 operates at a fixed 800kHz switching fre-
quency, or it can be synchronized to an external signal.
Synchronize switching to an external signal between
500kHz and 1.6MHz by driving SYNC with that signal. In
this mode, the rising edge of the signal at SYNC turns on
the P-channel switch. When changing switching frequen-
cy, the external components CIN, COUT and L must be
changed according to the component equations. The
external clock duty cycle is limited to a 30% to 90%
range.
14
8
DGND
PGND
SYNC
LDO
DGND
EP1
C7
150pF
C9
1μF
Figure 1: Typical Application Circuit.
The adjustable feedback resistors, combined with an
external feed forward capacitor (C1 in Figure 1), deliver
enhanced transient response for extreme pulsed load
applications. The addition of the feed forward capacitor
typically requires a larger output capacitor C3/C4 for
stability. Larger C3/C4 values reduce overshoot and
undershoot during startup and load changes. However,
do not exceed 470pF to maintain stable operation.
PWM or Light Load Mode
The device can be set to operate in forced Pulse Width
Modulation (PWM) mode to filter or set the switching
noise to a desired frequency by connecting the SYNC to
a high logic level. Alternately, a combination PWM/LL
(Light Load) mode for improved light load efficiency can
be set by connecting the SYNC pin to GND or a low logic
level. When connecting SYNC to an external clock sig-
nal, the device is always in forced PWM mode.
The external resistors set the output voltage according
to the following equation:
⎛
⎝
R3⎞
R6⎠
V
OUT = 0.6V 1 +
or
V
⎛
⎝
⎞
-1 · R6
⎠
OUT
R3 =
V
REF
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1160.2007.11.1.1