Datasheet > A89503KLPTR-5

A89503KLPTR-5

更新时间： 2024-02-24 05:33:36

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45页	2739K
描述
Motion Control Electronic,

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技术参数
数据手册

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A89503KLPTR-5 技术参数

生命周期：	Active	Reach Compliance Code：	compliant
Base Number Matches：	1

A89503KLPTR-5 数据手册

A89503

80 V Automotive Half-Bridge MOSFET Driver

ELECTRICAL CHARACTERISTICS (continued): Valid for T_J= –40 to 150°C, V_BB= 5.5 to 80 V, unless otherwise specified

Characteristics

Symbol

Test Conditions

Min.

Typ.

Max.

Unit

LOGIC INPUT AND OUTPUTS

Except RESETn

RESETn

–

0.3 × V_IO

Input Low Voltage

V_IL

V_IH

–

0.8

–

Except RESETn

RESETn

0.7 × V_IO

–

Input High Voltage

2.4

–

Except RESETn

RESETn

250

550

500

100

0.2

–

kΩ

µA

kΩ

µA

kΩ

Input Hysteresis

V_Ihys

200

–

R_PD

I_PD

0 < V_IN< V_IO

V_IO< V_IN< 80 V

0 < V_IN< V_IO

V_IO< V_IN< 80 V

0 < V_IN< V_IO

–

Input Pull-Down HS, ENABLE, RESETn

–

R_PD

I_PD

–

Input Pull-Up LSn

–

Input Pull-Down SDI, SCK

R_PDS

R_PUS

V_OL

V_OHS

I_OS

–

Input Pull-Up STRn (to V_IO

)

–

Output Low Voltage

I_OL= 1 mA

–

0.4

–

Output High Voltage

I_OS= –1 mA^[1]

V_IO– 0.4

Output Leakage SDO ^[1]

0 V < V_OS< V_IO, STRn = 1

–1

–

µA

0 V < V_OD< 12 V, DIAG active

18 V ≤ V_OD< 80 V, DIAG active

0 V < V_OD< 12 V, DIAG inactive

18 V ≤ V_OD< 80 V, DIAG inactive

–

2.5

Output Current Limit (DIAG)

Output Leakage ^[1](DIAG)

I_OLDLIM

–

–1

–

I_OD

–

2.5

LOGIC I/O – DYNAMIC PARAMETERS

Reset Pulse Width

t_RST

t_RSD

0.5

–

4.5

–

µs

Reset Shutdown Time

Input Pulse Filter Time

t_PIN

HS, LSn

–

Clock High Time

t_SCKH

t_SCKL

t_STLD

t_STLG

t_STRH

t_SDOE

t_SDOD

t_SDOV

t_SDOH

t_SDIS

t_SDIH

t_EN

A in Figure 4

100

350

–

Clock Low Time

B in Figure 4

–

Strobe Lead Time

C in Figure 4

–

Strobe Lag Time

D in Figure 4

–

Strobe High Time

E in Figure 4

–

Data Out Enable Time

F in Figure 4, C_LOAD= 10 pF

G in Figure 4

–

Data Out Disable Time

–

Data Out Valid Time From Clock Falling

Data Out Hold Time From Clock Falling

Data In Set-Up Time To Clock Rising

Data In Hold Time From Clock Rising

Wake Up From Sleep

H in Figure 4, C_LOAD= 10 pF

I in Figure 4

–

J in Figure 4

–

K in Figure 4

–

C_CP= 2.2 µF, C_REG= 10 µF

Continued on the next page…

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

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