5秒后页面跳转
A5976GLPTR-T PDF预览

A5976GLPTR-T

更新时间: 2022-02-26 14:09:16
品牌 Logo 应用领域
急速微 - ALLEGRO /
页数 文件大小 规格书
16页 628K
描述
Microstepping DMOS Driver with Translator

A5976GLPTR-T 数据手册

 浏览型号A5976GLPTR-T的Datasheet PDF文件第4页浏览型号A5976GLPTR-T的Datasheet PDF文件第5页浏览型号A5976GLPTR-T的Datasheet PDF文件第6页浏览型号A5976GLPTR-T的Datasheet PDF文件第8页浏览型号A5976GLPTR-T的Datasheet PDF文件第9页浏览型号A5976GLPTR-T的Datasheet PDF文件第10页 
A5976  
Microstepping DMOS Driver with Translator  
FUNCTIONAL DESCRIPTION  
Internal PWM Current Control  
Device Operation  
The A5976 is a complete microstepping motor driver with built-  
in translator for easy operation with minimal control lines. It is  
designed to operate bipolar stepper motors in full-, half-,  
Each full-bridge is controlled by a fixed off-time PWM current-  
control circuit that limits the load current to an appropriate  
level (ITRIP). Initially, a diagonal pair of source and sink DMOS  
quarter-, and sixteenth-step modes. The current in each of the two outputs are enabled, and current flows through the motor wind-  
output full-bridges, all N-channel DMOS, is regulated with fixed  
off-time pulse-width modulated (PWM) control circuitry. The  
full-bridge current at each step is set by the value of an external  
current-sense resistor (RS), a reference voltage (VREF), and the  
output voltage of its DAC (which in turn is controlled by the  
output of the translator).  
ing and the current-sense resistor, RS. When the voltage across  
RS rises to the DAC output voltage, the current-sense comparator  
resets the PWM latch, which turns off the source driver (in slow-  
decay mode) or the sink and source drivers (in fast- or mixed-  
decay mode).  
The maximum level of current limiting is set by the selection of  
RS and the voltage at the VREF input with a transconductance  
function approximated by:  
At power-up, or reset, the translator sets the DACs and phase  
current polarity to the initial home state (see figures for home-  
state conditions), and sets the current regulator for both phases to  
mixed-decay mode. When a step command signal occurs on the  
STEP input, the translator automatically sequences the DACs to  
the next level (see Table 2 for the current level sequence and cur-  
rent polarity). The microstep resolution is set by inputs MS1 and  
MS2 as shown in Table 1. If the new DAC output level is lower  
than the previous level, the decay mode for that full-bridge will  
be set by the PFD input (fast, slow, or mixed decay). If the new  
DAC level is higher or equal to the previous level, then the decay  
mode for that full-bridge will be slow decay. This automatic  
current-decay selection will improve microstepping performance  
by reducing the distortion of the current waveform due to the  
motor BEMF.  
ITRIPmax = VREF / (8 × RS)  
The DAC output reduces the VREF output to the current-sense  
comparator in precise steps (see Table 2 for % ITRIPmax at each  
step).  
I
TRIP = (% ITRIPmax / 100) × ITRIPmax  
It is critical to ensure that the maximum rating on the SENSE  
terminal is not exceeded (0.5 V). For full-step mode, VREF can be  
applied up to the maximum rating of VDD, because the peak sense  
value is 0.707 × VREF / 8. In all other modes, VREF should not  
exceed 4 V.  
Fixed Off-Time  
The DECAY input determines how the decay mode is selected  
when stepping the motor. If the DECAY input is high, when step-  
ping, if the new output levels of the DACs are higher than or equal  
to their previous levels, then the decay mode for that full-bridge is  
set to slow. If the DECAY input is high and the new output levels  
of the DACs are lower than their previous output levels, then the  
decay mode for that full-bridge is set by the state of the PFD input  
(see PFD input description). This automatic current decay selection  
improves microstepping performance by reducing the distortion of  
the current waveform that results from the back-EMF of the motor.  
If the DECAY input is low, then the decay mode is always set by  
the state of the PFD input (see PFD input description). See Figure 6  
on page 13 and Figure 7 on page 14 for decay mode detail.  
The internal PWM current-control circuitry uses a one-shot to  
control the time that the drivers remain off. The one-shot off-  
time, tOFF, is determined by the selection of an external resis-  
tor (RT) and capacitor (CT) connected between the RC timing  
terminal and ground. The off-time, over a range of values of CT  
= 470 pF to 1500 pF and RT = 12 kΩ to 100 kΩ is approximated  
by:  
tOFF = RT × CT  
Allegro MicroSystems, LLC  
7
115 Northeast Cutoff, Box 15036  
Worcester, Massachusetts 01615-0036 (508) 853-5000  
www.allegromicro.com  

与A5976GLPTR-T相关器件

型号 品牌 描述 获取价格 数据表
A5977 ALLEGRO Microstepping DMOS Driver with Translator

获取价格

A5977GLPTR-T ALLEGRO Microstepping DMOS Driver with Translator

获取价格

A5979 ALLEGRO Microstepping DMOS Driver with Translator

获取价格

A5979GLPTR-T ALLEGRO Microstepping DMOS Driver with Translator

获取价格

A5984 ALLEGRO DMOS Microstepping Driver with Translator

获取价格

A5984GESTR-T ALLEGRO DMOS Microstepping Driver with Translator

获取价格