A5977
Microstepping DMOS Driver with Translator
FEATURES AND BENEFITS
• ±2.8 A, 40 V output rating
DESCRIPTION
The A5977 is a complete microstepping motor driver with
built-in translator. It is designed to operate bipolar stepper
motors in full-, half-, quarter-, and eighth-step modes, with
outputdrivecapabilityof40Vand±2.8A.TheA5977includes
afixedoff-timecurrentregulatorthathastheabilitytooperatein
slow-,fast-,ormixed-decaymodes.Thiscurrent-decaycontrol
scheme results in reduced audible motor noise, increased step
accuracy, and reduced power dissipation.
• Low RDS(on) outputs, 0.22 Ω source, 0.15 Ω sink typical
• Automatic current decay mode detection/selection
• 3 to 5.5 V logic supply voltage range
• Mixed, fast, and slow current decay modes
• Home output
• Synchronous rectification for low power dissipation
• Internal UVLO and thermal shutdown circuitry
• Crossover-current protection
• Short-to-ground protection
• Short-to-VBB protection
• Shorted load protection
The translator is the key to the easy implementation of the
A5977.SimplyinputtingonepulseontheSTEPinputdrivesthe
motor one step (two logic inputs determine if it is a full-, half-,
quarter-, or eighth-step). There are no phase sequence tables,
high-frequencycontrollines,orcomplexinterfacestoprogram.
The A5977 interface is an ideal fit for applications where a
complex microprocessor is unavailable or overburdened.
Internalsynchronousrectificationcontrolcircuitryisprovided
to improve power dissipation during PWM operation. Internal
circuit protection includes thermal shutdown with hysteresis,
undervoltage lockout (UVLO), and crossover-current
protection. Special power-up sequencing is not required.
Package: 28-lead TSSOP (suffix LP) with
exposed thermal pad
The A5977 is supplied in a thin (<1.2 mm) 28-pin TSSOP
with an exposed thermal pad (suffix LP). The package is lead
(Pb) free (suffix -T), with 100% matte-tin leadframe plating.
Not to scale
Typical Application
CP1
Logic
Supply
VDD
CP2
VCP
REF
PFD
Load
Supply
VBB1
VBB2
100 µF
HOMEn
STEP
DIR
A5977
OUT1A
OUT1B
Microcontroller
RESETn
SENSE1
or
SLEEPn
Controller Logic
SENSE2
ENABLEn
MS1
MS2
SR
OUT2A
OUT2B
RC1
RC2
VREG
GND
PGND
A5977-DS, Rev. 2