Datasheet > A4919

A4919

更新时间： 2022-05-14 22:19:46

品牌	Logo	应用领域
急速微 - ALLEGRO		/
页数	文件大小	规格书
22页	956K
描述
Three-Phase MOSFET Driver with Integrated Regulator

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数据手册

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A4919 数据手册

Three-Phase MOSFET Driver

with Integrated Regulator

A4919

For Reference Only – Not for Tooling Use

(Reference JEDEC MO-220VHHD-1)

NOT TO SCALE

All dimensions nominal unless otherwise stated – Dimensions in millimeters

Exact case and lead conﬁguration at supplier discretion within limits shown

5.00

0.50

0.30

1.15

5.00

3.15

4.80

3.15

4.80

29X

0.90

0.08

PCB Layout Reference View

SEATING

PLANE

0.25

0.50

3.15

0.55

Terminal #1 mark area

Exposed thermal pad (reference only, terminal #1 identiﬁer appearance at supplier discretion)

3.15

Reference land pattern layout (reference IPC7351 QFN50P500X500X100-29V1M);

All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet

application process requirements and PCB layout tolerances; when mounting on a

multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal

dissipation (reference EIA/JEDEC Standard JESD51-5)

Coplanarity includes exposed thermal pad and terminals

Figure 7: Package ET, 28-Terminal QFN with Exposed Thermal Pad

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

1...18 19 202122

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