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A43P26161V-75UF

更新时间： 2024-01-08 11:23:44

品牌	Logo	应用领域
联笙电子 - AMICC		存储动态存储器
页数	文件大小	规格书
44页	1122K
描述
1M X 16 Bit X 4 Banks Low Power Synchronous DRAM

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技术参数
数据手册

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A43P26161V-75UF 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.75
Is Samacsys：	N	Base Number Matches：	1

A43P26161V-75UF 数据手册

A43P26161

AC Operating Test Conditions

(VDD = 2.3V~2.7V, T^A= 0ºC to +70ºC for commercial or TA =-40ºC to +85ºC for extended)

Parameter

Value

Unit

AC input levels

0.9 x VDDQ/0.2

0.5 x VDDQ

tr/tf = 1/1

Input timing measurement reference level

Input rise and all time (See note3)

Output timing measurement reference level

Output load condition

0.5 x VDDQ

See Fig.2

VDDQ

V^OH(DC) = VDDQ-0.2V, IOH = -0.1mA

V^OL(DC) = 0.2V, IOL = 0.1mA

V^TT=0.5V x VDDQ

500Ω

50Ω

Output

ZO=50Ω

OUTPUT

30pF

500Ω

30pF

(Fig. 2) AC Output Load Circuit

(Fig. 1) DC Output Load Circuit

AC Characteristics

(AC operating conditions unless otherwise noted)

-75

-95

Symbol

Parameter

Unit

Note

Min

7.5

Max

Min

Max

CL=3

CL=2

CL=3

CL=2

9.5

tCC

CLK cycle time

1000

CLK to valid

Output delay

tSAC

tOH

tCH

1,2

Output data hold time

2.5

3.5

CL=3

CL=2

CL=3

CL=2

CL=3

CL=2

CLK high pulse width

tCL

tSS

CLK low pulse width

Input setup time

tSH

Input hold time

1.5

tSLZ

CLK to output in Low-Z

CL=3

CL=2

tSHZ

CLK to output in Hi-Z

CL=CAS Latency.

*All AC parameters are measured from half to half.

Note : 1. Parameters depend on programmed CAS latency.

2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.

3. Assumed input rise and fall time (tr & tf) = 1ns.

If tr & tf is longer than 1ns, transient time compensation should be considered,

i.e., [(tr + tf)/2-1]ns should be added to the parameter.

PRELIMINARY (July, 2005, Version 1.1)

AMIC Technology, Corp.

1...4 5 678 9 10...44

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