Datasheet > A43L2616A

A43L2616A

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
42页	1102K
描述
1M X 16 Bit X 4 Banks Synchronous DRAM

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数据手册

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A43L2616A 数据手册

A43L2616A

AC Operating Test Conditions

(VDD = 3.3V ±0.3V, TA = 0°C to +70°C or TA = -40ºC to +85ºC)

Parameter

Value

AC input levels

VIH/VIL = 2.4V/0.4V

1.4V

Input timing measurement reference level

Input rise and all time (See note3)

Output timing measurement reference level

Output load condition

tr/tf = 1ns/1ns

1.4V

See Fig.2

3.3V

V^OH(DC) = 2.4V, IOH = -2mA

V^OL(DC) = 0.4V, IOL = 2mA

VTT =1.4V

50Ω

1200Ω

Output

ZO=50Ω

OUTPUT

50pF

870Ω

50pF

(Fig. 2) AC Output Load Circuit

(Fig. 1) DC Output Load Circuit

AC Characteristics

(AC operating conditions unless otherwise noted)

-6

-7

Symbol

Parameter

CAS Latency

Unit

Note

Min

Max

Min

Max

tCC

CLK cycle time

1000

tSAC

CLK to valid

Output delay

5.4

1,2

tOH

tCH

Output data hold time

CLK high pulse width

2.5

2.7

2.5

tCL

CLK low pulse width

2.5

tSS

tSH

Input setup time

Input hold time

tSLZ

tSHZ

CLK to output in Low-Z

CLK to output In Hi-Z

5.5

*All AC parameters are measured from half to half.

Note : 1. Parameters depend on programmed CAS latency.

2. If clock rising time is longer than 1ns, (tr/2-0.5) ns should be added to the parameter.

3. Assumed input rise and fall time (tr & tf) = 1ns.

If tr & tf is longer than 1ns, transient time compensation should be considered,

i.e., [(tr + tf)/2-1]ns should be added to the parameter.

PRELIMINARY (November, 2004, Version 0.0)

AMIC Technology, Corp.

1...4 5 678 9 10...42

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