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A43L1632AG-5.5F PDF预览

A43L1632AG-5.5F

更新时间: 2024-02-14 18:55:20
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联笙电子 - AMICC 动态存储器
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43页 740K
描述
DRAM

A43L1632AG-5.5F 数据手册

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A43L1632A  
AC Characteristics  
(AC operating conditions unless otherwise noted)  
-5  
-5.5  
Max  
-6  
-7  
Symbol  
Parameter  
Unit  
Note  
Min  
5
Max  
Min  
5.5  
10  
-
Min  
6
Max  
Min  
Max  
CAS Latency=3  
7
10  
-
1000  
1000  
1000  
1000  
ns  
ns  
1
tCC  
CLK cycle time  
CAS Latency=2  
CAS Latency=3  
CAS Latency=2  
10  
-
10  
-
4.5  
5.0  
5.5  
5.5  
CLK to valid  
output delay  
tSAC  
tOH  
tCH  
1,2  
-
6
-
6
-
6
-
6
Output data hold time  
CAS Latency=3  
CAS Latency=2  
2
-
-
2
-
-
2
-
-
2
-
-
ns  
ns  
2
3
2
2
2.5  
3
3
CLK high pulse  
width  
3
-
3
-
-
3
-
CLK low pulse CAS Latency=3  
width  
2
-
2
-
2.5  
3
-
3
-
tCL  
tSS  
ns  
ns  
3
3
CAS Latency=2  
3
-
3
-
-
3
-
Input setup  
time  
CAS Latency=3  
CAS Latency=2  
1.5  
2.5  
1
-
1.5  
2.5  
1
-
1.5  
2.5  
1
-
1.75  
2.5  
1
-
-
-
-
-
tSH  
Input hold time  
-
-
-
-
ns  
ns  
3
2
tSLZ  
CLK to output in Low-Z  
1
-
1
-
1
-
1
-
CAS Latency=3  
CAS Latency=2  
-
4.5  
6
-
5.0  
6
-
5.5  
6
-
5.5  
6
CLK to output  
in Hi-Z  
tSHZ  
ns  
-
-
-
-
-
Note : 1. Parameters depend on programmed CAS latency.  
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.  
3. Assumed input rise and fall time (tr & tf) = 1ns.  
If tr & tf is longer than 1ns, transient time compensation should be considered,  
i.e., [(tr + tf)/2-1]ns should be added to the parameter.  
PRELIMINARY (March, 2007, Version 0.0)  
8
AMIC Technology, Corp.