Datasheet > A43L1616V-7I

A43L1616V-7I

更新时间： 2024-01-14 21:17:53

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
42页	502K
描述
1M X 16 Bit X 4 Banks Synchronous DRAM

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

A43L1616V-7I 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.75
Base Number Matches：	1

A43L1616V-7I 数据手册

A43L2616B

Operating AC Parameter

(AC operating conditions unless otherwise noted)

Version

Symbol

Parameter

Unit

Note

-6

-7

tRRD(min)

tRCD(min)

Row active to row active delay

RAS to

delay

CAS

tRP(min)

tRAS(min)

tRAS(max)

tRC(min)

Row precharge time

Row active time

μs

100

Row cycle time

tCDL(min)

tRDL(min)

tBDL(min)

tCCD(min)

Last data in new col. Address delay

Last data in row precharge

Last data in to burst stop

Col. Address to col. Address delay

CAS Latency = 3

CAS Latency = 2

Number of valid output data

Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and

then rounding off to the next higher integer.

2. Minimum delay is required to complete write.

3. In case of row precharge interrupt, auto precharge and read burst stop.

(December, 2009, Version 1.3)

AMIC Technology, Corp.

1...5 6 789 10 11...42

中文翻译

下载PDF

与A43L1616V-7I相关器件

型号	品牌	描述	获取价格	数据表
A43L1616V-7UF	AMICC	1M X 16 Bit X 2 Banks Synchronous DRAM	获取价格
A43L1616V-95I	AMICC	1M X 16 Bit X 4 Banks Synchronous DRAM	获取价格
A43L1632	AMICC	512K X 32 Bit X 4 Banks Synchronous DRAM	获取价格
A43L1632AG-5.5F	AMICC	DRAM	获取价格
A43L1632AG-5.5UF	AMICC	DRAM	获取价格
A43L1632AG-5F	AMICC	DRAM	获取价格