Datasheet > A43L1616V-6F

A43L1616V-6F

更新时间： 2024-01-09 18:01:44

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
44页	1269K
描述
1M X 16 Bit X 2 Banks Synchronous DRAM

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技术参数
数据手册

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A43L1616V-6F 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.75
Base Number Matches：	1

A43L1616V-6F 数据手册

A43L1616

Self Refresh Entry & Exit Cycle

CLOCK

CKE

* Note 4

* Note 2

RC min.

* Note 6

* Note 1

* Note 3

* Note 5

RAS

CAS

* Note 7

ADDR

A10/AP

DQM

Hi-Z

Self Refresh Exit

Auto Refresh

Self Refresh Entry

: Don't care

* Note : TO ENTER SELF REFRESH MODE

1. with CKE should be low at the same clock cycle.

CS RAS CAS

2. After 1 clock cycle, all the inputs including the system clock can be don’t care except for CKE.

3. The device remains in self refresh mode as long as CKE stays “Low”.

(cf.) Once the device enters self refresh mode, minimum tRAS is required before exit from self refresh.

TO EXIT SELF REFRESH MODE

4. System clock restart and be stable before returning CKE high.

starts from high.

6. Minimum tRC is required after CKE going high to complete self refresh exit.

7. Before/After self refresh mode, AUTO REFRESH commands must be issued every 15.6μs or less as both SELF

REFRESH and AUTO REFRESH utilize the row refresh counter.

PRELIMINARY (August, 2005, Version 0.0)

AMIC Technology, Corp.

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A43L1616V-95I	AMICC	1M X 16 Bit X 4 Banks Synchronous DRAM	获取价格