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A3992SB-T PDF预览

A3992SB-T

更新时间: 2024-02-11 01:07:34
品牌 Logo 应用领域
急速微 - ALLEGRO 电动机控制光电二极管
页数 文件大小 规格书
13页 588K
描述
Stepper Motor Controller, 1.5A, NMOS, PDIP24, LEAD FREE, PLASTIC, MS-001BE, DIP-24

A3992SB-T 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP24,.3针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:8.5
其他特性:ALSO REQUIRES 15V TO 50V VBB SUPPLY模拟集成电路 - 其他类型:STEPPER MOTOR CONTROLLER
JESD-30 代码:R-PDIP-T24JESD-609代码:e3
长度:30.1 mm功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-20 °C最大输出电流:1.5 A
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP24,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:50 V认证状态:Not Qualified
座面最大高度:5.33 mm子类别:Motion Control Electronics
最大供电电流 (Isup):12 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:NMOS
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

A3992SB-T 数据手册

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DMOS Dual Full-Bridge  
Microstepping PWM Motor Driver  
A3992  
Serial Interface Description  
The A3992 is controlled via a 3 wire serial port. The  
programmable functions allow maximum exibility in  
conguring the PWM to the motor drive requirements.  
The serial data is written as two 19 bit words, 1 bit  
to select which word (referred to here as Word 0 and  
Word 1) and 18 bits of data. The serial port is dened  
in the following tables and text descriptions.  
D7 – 12 Bridge 2 Linear DAC. 6 bit word to set the  
desired current level for bridge 2. Setting all bits to  
zero disables Full Bridge 2, all drivers off. (See Cur-  
rent Regulation in the Functional Description section.)  
D13 Bridge 1 Phase. This bit controls the direction  
of current for motor phase 1 as dened below:  
D13  
OUT1A  
OUT1B  
0
L
H
L
Word 0 Bit Assignments  
1
H
Word 0 is selected by setting D0 = 0. Assignments are  
summarized in the following table, and described in  
detail in the remainder of this section.  
Word 0 Bit Assignments  
D14 Bridge 2 Phase. This bit controls the direction  
of current for motor phase 2 as dened below:  
D14  
OUT2A  
OUT2B  
0
L
H
L
Bit  
D0  
Function  
Word Select = 0  
Bridge 1, DAC, LSB  
Bridge 1, DAC, Bit2  
Bridge 1, DAC, Bit3  
Bridge 1, DAC, Bit4  
Bridge 1, DAC, Bit 5  
Bridge 1, DAC, MSB  
Bridge 2, DAC, LSB  
Bridge 2, DAC, Bit2  
Bridge 2, DAC, Bit3  
Bridge 2, DAC, Bit4  
Bridge 2, DAC, Bit 5  
Bridge 2, DAC, MSB  
Bridge 1 Phase  
1
H
D1  
D15 Bridge 1 Mode. This bit determines the decay  
for Full Bridge 1 as dened below:  
D2  
D3  
D15  
Mode  
D4  
0
Mixed Decay  
Slow Decay  
D5  
1
D6  
D7  
D16 Bridge 2 Mode. This bit determines the decay  
for Full Bridge 2 as dened below:  
D8  
D9  
D16  
Mode  
D10  
D11  
D12  
D13  
D14  
D15  
D16  
D17  
D18  
0
Mixed Decay  
Slow Decay  
1
D17 Ref Select. This bit determines the reference  
input for the two 6 bit linear DACs. Logic low selects  
internal 2 V reference voltage, logic high selects ex-  
ternal reference input on the REF pin.  
Bridge 2 Phase  
Bridge 1 Mode  
Bridge 2 Mode  
Reference Select  
Range Select  
D18 Gm Range Select. D18 determines if the scaling  
factor used is 4 or 8:  
D1 – D6 Bridge 1, Linear DAC. 6 bit word to set de-  
sired current level for bridge 1. Setting all bits to zero  
disables Full Bridge 1, all drivers off. (See Current  
Regulation in the Functional Description section.)  
D18  
0
Divider  
÷ 8  
Load Current  
ITRIP = VDAC/(RSENSE × 8)  
ITRIP = VDAC/(RSENSE × 4)  
1
÷ 4  
Allegro MicroSystems, LLC  
115 Northeast Cutoff, Box 15036  
5
Worcester, Massachusetts 01615-0036 (508) 853-5000  
www.allegromicro.com  

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