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A3950 PDF预览

A3950

更新时间: 2024-02-02 06:21:25
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器
页数 文件大小 规格书
9页 318K
描述
DMOS Full-Bridge Motor Driver

A3950 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:HTSSOP, TSSOP16,.25
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:7.9Samacsys Confidence:4
Samacsys Status:Released2D Presentation:https://componentsearchengine.com/2D/0T/520598.1.1.png
Schematic Symbol:https://componentsearchengine.com/symbol.php?partID=520598PCB Footprint:https://componentsearchengine.com/footprint.php?partID=520598
3D View:https://componentsearchengine.com/viewer/3D.php?partID=520598Samacsys PartID:520598
Samacsys Image:https://componentsearchengine.com/Images/9/A3950SLP-T.jpgSamacsys Thumbnail Image:https://componentsearchengine.com/Thumbnails/1/A3950SLP-T.jpg
Samacsys Pin Count:17Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline PackagesSamacsys Footprint Name:16 TSSOP+EP
Samacsys Released Date:2017-12-17 22:52:25Is Samacsys:N
模拟集成电路 - 其他类型:BRUSH DC MOTOR CONTROLLERJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:5 mm
湿度敏感等级:2功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-20 °C最大输出电流:2.8 A
封装主体材料:PLASTIC/EPOXY封装代码:HTSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:8/36 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Motion Control Electronics
最大供电电流 (Isup):8.5 mA最大供电电压 (Vsup):36 V
最小供电电压 (Vsup):8 V表面贴装:YES
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

A3950 数据手册

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Preliminary Data Sheet  
Subject to Change without Notice  
November 4, 2005  
A3950  
DMOS Full-Bridge Motor Driver  
Applications Information  
power dissipation and may need to be considered in high  
current, high ambient temperature applications. In addition,  
motor parameters and switching losses can add power dis-  
sipation that could affect critical applications.  
Power Dissipation. First order approximation of power  
dissipation in the A3950 can be calculated by first examining  
the power dissipation in the full-bridge during each of the  
operation modes. The A3950 features synchronous rectifica-  
tion, a feature that effectively shorts out the body diode by  
turning on the low RDS(on) DMOS driver during the decay  
cycle. This significantly reduces power dissipation in the  
full-bridge. In order to prevent shoot-through, where both  
source and sink driver are on at the same time, the A3950  
implements a 500 ns typical crossover delay time. For this  
period, the body diode in the decay current path conducts  
the current until the DMOS driver turns on. This does affect  
Drive Current. This current path is through source DMOS  
driver, motor winding, and sink DMOS driver. Power dissi-  
pation is I2R loses in one source and one sink DMOS driver,  
as shown in the following equation:  
P = I2 (RDS(on)Source + RDS(on)Sink  
)
(1)  
D
Fast Decay with Synchronous Rectification. This  
decay mode is equivalent to a phase change where the oppo-  
site drivers are switched on. When in fast decay, the motor  
current is not allowed to go negative (direction change).  
Instead, as the current approaches zero, the drivers turn off.  
The power calculation is the same as the drive current calcu-  
lation, equation 1:  
VBB  
Slow Decay SR (Brake Mode). In this decay mode, both  
sink drivers turn on, allowing the current to circulate through  
the sink drivers and the load. Power dissipation is I2R loses  
in the two sink DMOS drivers:  
1
3
2
P = I2 (2× RDS(on)Sink  
)
(2)  
D
Layout. The printed circuit board should include a heavy  
ground plane. For optimum electrical and thermal perfor-  
mance, the exposed thermal pad of the device should be sol-  
dered directly to an exposed copper area directly under the  
device. The load supply pin, VBB, should be decoupled with  
an electrolytic capacitor (typically 100 μF) in parallel with a  
ceramic capacitor placed as close as possible to the device.  
The ceramic capacitors between VCP and VBB, connected  
to VREG, and between CP1 and CP2, should be as close to  
the pins of the device as possible, in order to minimize lead  
inductance.  
1
2
3
Drive current  
Fast decay with synchronous rectification (reverse)  
Slow decay with synchronous rectification (brake)  
Figure 1. Current Decay Patterns  
Allegro MicroSystems, Inc.  
7
115 Northeast Cutoff, Box 15036  
A3950DS  
Worcester, Massachusetts 01615-0036 (508) 853-5000  
www.allegromicro.com  

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