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A3935KLQTR PDF预览

A3935KLQTR

更新时间: 2024-01-06 15:22:03
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急速微 - ALLEGRO 控制器
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13页 328K
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A3935KLQTR 数据手册

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3-Phase Power MOSFET Controller for Automotive Applications  
A3935  
Terminal Descriptions  
AHI, BHI, and CHI. Direct control of high-side gate outputs  
GHA, GHB, and GHC. Logic 1 drives the gate on. Logic 0 pulls  
the gate down, turning off the external power MOSFET. Inter-  
nally pulled down when the terminal is open.  
LSS. Low-side gate driver return. Connects to the common  
sources on the low sides of the power MOSFET bridge.  
OVFLT. Logic 1 indicates that the VBAT level exceeded the  
VBAT overvoltage trip point set by the OVSET level. It will  
recover after exceeding a hysteresis below that maximum value.  
Normally, it has a high-impedance state. If OVFLT and UVFLT  
are both in high-impedance state; then, at least, a thermal  
shutdown or VDD undervoltage has occurred.  
ALO, BLO, and CLO. Direct control of low-side gate outputs  
GHA, GHB, and GHC. Logic 1 drives the gate on. Logic 0 pulls  
the gate down, turning off the external power MOSFET. Inter-  
nally pulled down when the terminal is open.  
BOOSTD. Boost converter switch drain connection.  
BOOSTS. Boost converter switch source connection.  
OVSET. A positive dc level that controls the VBAT overvoltage  
trip point. Usually, set by a precision resistor divider network  
between VDD and GND, but can be held grounded for a preset  
value. When this terminal is open, it sets an unspecified but high  
overvoltage trip point.  
CA, CB, and CC. High-side connection for the bootstrap  
capacitors, CBOOTx, positive supply for high-side gate drive.  
The bootstrap capacitor is charged to VREG when the output Sx  
terminal is low. When the output swings high, the voltage on this  
terminal rises with the output to provide the boosted gate voltage  
needed for N-channel power MOSFETs.  
SA, SB, and SC. Directly connected to the motor terminals,  
these terminals sense the voltages switched across the load and  
are connected to the negative side of the bootstrap capacitors,  
CBOOTx. Also, are the negative supply connection for the  
floating high-side drivers.  
CSN. Input for current-sense differential amplifier, on the  
inverting, negative side. Kelvin connection for the ground side of  
the current-sense resistor, RSENSE.  
UVFLT. Logic 1 indicates that the VBAT level is below its  
minimum value. It will recover after exceeding a hysteresis above  
that minimum value. Has a high-impedance state. If UVFLT and  
OVFLT are both in high-impedance state; then, at least, a thermal  
shutdown or VDD undervoltage has occurred.  
CSOUT. Amplifier output voltage proportional to the current  
sensed across an external low-value resistor placed in the ground  
side of the power MOSFET bridge.  
CSP. Input for current-sense differential amplifier, on the non-  
inverting, positive side. Connected to the positive side of the  
sense resistor, RSENSE.  
VBAT. Battery voltage. Positive input. usually connected to the  
motor voltage supply.  
ENABLE. Logic 0 disables the gate control signals and switches  
off all the gate drivers (low) causing a coast condition. Can be  
used in conjunction with the gate inputs to PWM (pulse wave  
modulate) the load current. Internally pulled down when the  
terminal is open.  
VBOOST. Boost converter output, 16 V nominal, is also the  
input to the regulator for VREG. Has internal boost-current  
and boost-voltage control loops. In high-voltage systems is  
approximately one diode drop below VBAT  
.
VDD. Logic supply, +5 V nominal.  
¯F¯¯A¯¯U¯¯L¯¯T¯. Diagnostic logic output signal. When low, indicates  
that one or more fault conditions have occurred.  
VDRAIN. Kelvin connection for drain-to-source voltage monitor.  
Connected to the high-side drains of the MOSFET bridge. High  
impedance when this terminal is open, and registers as a short-to-  
ground fault on all motor phases.  
GHA, GHB, and GHC. High-side gate drive outputs for  
N-channel MOSFET drivers. External series gate resistors can  
control the slew rate seen at the power driver gate, thereby  
controlling the di/dt and dv/dt of Sx outputs.  
VDSTH. A positive dc level that sets the drain-to-source monitor  
threshold voltage. Internally pulled down when this terminal is  
open.  
GLA, GLB, and GLC. Low-side gate drive outputs for external,  
N-channel MOSFET drivers. External series gate resistors can  
control slew rate.  
VREG. High-side gate driver supply, 13.5 V nominal. Has low-  
GND. Ground, or negative, side of VDD and VBAT supplies.  
voltage dropout (LDO) feature.  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff, Box 15036  
8
Worcester, Massachusetts 01615-0036 (508) 853-5000  
www.allegromicro.com  

A3935KLQTR 替代型号

型号 品牌 替代类型 描述 数据表
A3935KLQ-T ALLEGRO

完全替代

3-Phase Power MOSFET Controller for Automotive Applications
A3935KLQ ALLEGRO

完全替代

3-PHASE POWER MOSFET CONTROLLER

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