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A3525AC21O20TRA PDF预览

A3525AC21O20TRA

更新时间: 2022-12-14 18:11:17
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艾迈斯 - AMSCO /
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194页 3286K
描述
Advanced Audio Processor System

A3525AC21O20TRA 数据手册

 浏览型号A3525AC21O20TRA的Datasheet PDF文件第8页浏览型号A3525AC21O20TRA的Datasheet PDF文件第9页浏览型号A3525AC21O20TRA的Datasheet PDF文件第10页浏览型号A3525AC21O20TRA的Datasheet PDF文件第12页浏览型号A3525AC21O20TRA的Datasheet PDF文件第13页浏览型号A3525AC21O20TRA的Datasheet PDF文件第14页 
AS3525-A/-B C22O22  
Data Sheet, Confidential  
6
Electrical Specifications  
6.1 Absolute Maximum Ratings  
Stresses beyond those listed under “Absolute Maximum Ratings“ may cause permanent damage to the device. These are stress ratings only.  
Functional operation of the device at these or any other conditions beyond those indicated under “Operating Conditions” is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability. The device should be operated under recommended  
operating conditions.  
Table 1 Absolute Maximum Ratings  
Symbol  
VIN_SUP  
Parameter  
digital supply pins  
Min  
Max  
Unit  
Note  
-0.5  
3.7  
V
Applicable for pins vdd_peri, vdd_mem,  
usb_vdda33t1, usb_vdda33t2,  
usb_vdda33t3, usb_vdda33c  
VIN_CORE  
VIN_VB1V  
VIN_5V  
digital core supply pins  
single cell supply voltage  
5V pins  
-0.5  
-0.5  
-0.5  
1.68  
5.0  
V
V
V
Applicable for pins vdd_core  
Applicable for pin VBAT_1V  
7.0  
Applicable for pins BVDD, CHG_IN,  
VBUS  
VIN_SW15  
VIN_VSS  
15V pin  
-0.5  
-0.5  
17  
V
V
Applicable for pins SW15  
Voltage difference at VSS  
terminals  
0.5  
Applicable for pins VSS3,VSS15,  
VSSCP, BVSS, BVSS2, AVSS, DVSS,  
vss_core, vss_peri, vss_mem,  
usb_vssa33t, usb_vssa33c  
VIN_DVDD  
3.3V pins with diode to DVDD  
-0.5  
5.0  
DVDD+0.5  
V
Applicabel for pins MCLK, LRCK, SCLK,  
SDI, P_PVDD, BATTEMP, ISINK,  
XIN_32K, XOUT_32K, XIN_24M,  
XOUT_24M, INTRQ, XRES, CP_1V,  
CN_1V, CN_5V  
VIN_xDVDD  
VIN_AVDD  
pins with no diode to DVDD  
3.3V pins with diode to AVDD  
-0.5  
-0.5  
7.0V  
V
V
Applicable for pins  
CSCL, CSDA, PWR_UP, CP_5V  
Applicable for pins BGND, HPH_CM,  
HPGD, LOUTL/R, VREF, AGND,  
LIN1L/R, LIN2L/R, MIC1_P/N,  
MIC2_P/N, MSUP1, MSUP2  
5.0  
AVDD+0.5  
VIN_REG  
VIN_RVDD  
VIN_BVDD  
Iscr  
voltage regulator pins with  
diodes to BVDD  
voltage regulator pin with  
diode to BVDD  
-0.5  
-0.5  
-0.5  
-100  
5.0  
BVDD+0.5  
3.6  
BVDD+0.5  
7.0  
V
V
Applicable for pins AVDD, QLDO2,  
DVDD, PVDD, CPVDD, CVDD, UVDD  
Applicable for pins RVDD  
pins with diode to BVDD  
V
Applicable for pins LSPR/L, HPR/L,  
CHG_OUT, SW3  
Norm: JEDEC 17  
BVDD+0.5  
100  
Input Current (latchup  
immunity)  
mA  
ESD  
Electrostatic Discharge HBM  
+/-1  
+/-2  
kV  
kV  
Norm: JEDEC JESD22-A114C (1)  
ESD_USB Electrostatic Discharge HBM  
for USB Pins  
Pt  
Norm: JEDEC JESD22-A114C  
(Pins: usb_dp, usb_dm, usb_vbus)  
Valid for CTBGA144 package  
Total Power Dissipation (all  
supplies and outputs)  
Humidity non-condensing  
1000  
85  
mW  
%
H
5
(1)  
Electrostatic discharge of XIN24 and XOUT24 pin is +/-600V for C21O20  
© 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.  
www.austriamicrosystems.com Revision 1.13  
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