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A3212EUA-TL PDF预览

A3212EUA-TL

更新时间: 2024-01-31 12:04:09
品牌 Logo 应用领域
急速微 - ALLEGRO 开关
页数 文件大小 规格书
13页 377K
描述
Analog Circuit, 1 Func, BICMOS, PSSO3, ULTRA MINI, SIP-3

A3212EUA-TL 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SIP包装说明:,
针数:3Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.64
Is Samacsys:N模拟集成电路 - 其他类型:ANALOG CIRCUIT
JESD-30 代码:R-PSSO-G3JESD-609代码:e0
长度:4.105 mm功能数量:1
端子数量:3最高工作温度:150 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):240认证状态:Not Qualified
座面最大高度:1.57 mm最大供电电压 (Vsup):3.5 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):2.75 V
表面贴装:YES技术:BICMOS
温度等级:AUTOMOTIVE端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.035 mmBase Number Matches:1

A3212EUA-TL 数据手册

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A3211 and  
A3212  
Micropower, Ultrasensitive  
Hall Effect Switch  
FUNCTIONAL DESCRIPTION  
Low Average Power. Internal timing circuitry activates the  
sensor for 45 μs and deactivates it for the remainder of the pe-  
riod (45 ms). A short "awake" time allows for stabilization prior  
to the sensor sampling and data latching on the falling edge of  
the timing pulse. The output during the "sleep" time is latched in  
the last sampled state. The supply current is not affected by the  
output state.  
B
+V  
PERIOD  
"AWAKE"  
IDD(EN)  
"SLEEP"  
SAMPLE &  
OUTPUT LATCHED  
HALL  
VOLTAGE  
IDD(DIS)  
0
+
Dwg. WH-017-2  
Dwg. AH-011-2  
Chopper-Stabilized Technique. The Hall element can be  
considered as a resistor array similar to a Wheatstone bridge. A  
large portion of the offset is a result of the mismatching of these  
resistors. These devices use a proprietary dynamic offset cancel-  
lation technique, with an internal high-frequency clock to reduce  
the residual offset voltage of the Hall element that is normally  
caused by device overmolding, temperature dependencies, and  
thermal stress. The chopper-stabilizing technique cancels the  
mismatching of the resistor circuit by changing the direction of  
the current flowing through the Hall plate using CMOS switches  
and Hall voltage measurement taps, while maintaing the Hall-  
voltage signal that is induced by the external magnetic flux. The  
signal is then captured by a sample-and-hold circuit and further  
processed using low-offset bipolar circuitry. This technique  
produces devices that have an extremely stable quiescent Hall  
output voltage, are immune to thermal stress, and have precise  
recoverability after temperature cycling. A relatively high sam-  
pling frequency is used for faster signal processing capability  
can be processed.  
+V  
X
Dwg. EH-012-1  
More detailed descriptions of the circuit operation can be found  
in: Technical Paper STP 97-10, Monolithic Magnetic Hall Sensor  
Using Dynamic Quadrature Offset Cancellation and Technical  
Paper STP 99-1, Chopper-Stabilized Amplifiers With A Track-  
and-Hold Signal Demodulator.  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff, Box 15036  
7
Worcester, Massachusetts 01615-0036 (508) 853-5000  
www.allegromicro.com  

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