A29800 Series
The host system can detect whether a program or erase
operation is complete by reading the I/O7 ( Polling) and
I/O6 (toggle) status bits. After a program or erase cycle has
been completed, the device is ready to read array data or
accept another command.
The sector erase architecture allows memory sectors to be
erased and reprogrammed without affecting the data contents
of other sectors. The A29800 is fully erased when shipped
from the factory.
The Erase Suspend feature enables the user to put erase on
hold for any period of time to read data from, or program data
to, any other sector that is not selected for erasure. True
background erase can thus be achieved.
Power consumption is greatly reduced when the device is
placed in the standby mode.
Data
The hardware
pin terminates any operation in
RESET
progress and resets the internal state machine to reading
array data.
The hardware sector protection feature disables operations for
both program and erase in any combination of the sectors
of memory. This can be achieved via programming equipment.
Pin Configurations
SOP
TSOP (I)
RY/BY
1
RESET
WE
44
43
42
A18
A17
A7
2
3
4
A8
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE
RESET
NC
NC
RY/BY
A18
A17
A7
A6
1
2
3
4
5
6
7
8
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
A16
BYTE
VSS
I/O15 (A-1)
A9
41
40
39
38
A10
A11
A6
5
6
I/O
I/O14
I/O
I/O13
I/O
I/O12
I/O
7
A5
6
A4
A3
A2
A1
A0
A12
A13
7
8
37
36
35
34
9
5
10
11
12
13
14
15
16
17
18
19
A14
A15
9
4
10
11
VCC
I/O11
A29800V
A16
I/O
3
CE
12
13
14
15
16
17
18
19
20
21
33
32
31
30
29
28
27
26
BYTE
VSS
I/O10
I/O
I/O
I/O
I/O
I/O
2
9
VSS
OE
I/O15 (A-1)
1
8
I/O
I/O
I/O
I/O
I/O
0
I/O
I/O14
I/O
I/O13
I/O
I/O12
I/O
VCC
7
A5
A4
A3
A2
20
21
22
23
29
28
27
26
0
8
1
9
OE
VSS
CE
A0
6
A1
24
25
2
5
25
24
23
I/O10
I/O
I/O11
3
4
22
(December, 2009, Version 1.7)
2
AMIC Technology, Corp.