Datasheet > A14100AA-1CQ208C

A14100AA-1CQ208C

更新时间： 2022-12-17 00:16:47

品牌	Logo	应用领域
ACTEL		/
页数	文件大小	规格书
68页	480K
描述
Accelerator Series FPGAs - ACT 3Family

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A14100AA-1CQ208C 数据手册

P a c k a g e P i n A s s i g n m e n t s (c o n t in u e d )

2 2 5 -P in B G A (T o p Vie w )

10 11 12 13 14 15

A1460 Function

Location

CLKA or I/O

CLKB or I/O

DCLK or I/O

GND

A1, A15, D15, F8, G7, G8, G9, H6, H7, H8, H9, H10, J7, J8, J9, K8, P2, R15

HCLK or I/O

IOCLK or I/O

IOPCL or I/O

MODE

B14

P14

A11, B5, B7, D8, D12, F6, F11, H1, H12, H14, K11, L1, L13, N8, P5, R1, R8, R11, R14

PRA OR I/O

PRB or I/O

SDI or I/O

A8, B12, D5, D14, E3, E8, E13, H2, H3, H11, H15, K4, L2, L12, M8, M15, P4, P8, R13

Notes:

1. Unused I/O pins are designated as outputs by ALS and are driven low.

2. All unassigned pins are available for use as I/Os.

3. MODE should be terminated to GND through a 10K resistor to enable Actionprobe usage; otherwise it can be terminated directly to GND.

1 -2 3 6

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型号	品牌	描述	获取价格	数据表
A14100AA-1CQ208I	ACTEL	Accelerator Series FPGAs - ACT 3Family	获取价格
A14100AA-1CQ208M	ACTEL	Accelerator Series FPGAs - ACT 3Family	获取价格
A14100AA-1PG208B	ACTEL	Accelerator Series FPGAs - ACT 3Family	获取价格
A14100AA-1PG208C	ACTEL	Accelerator Series FPGAs - ACT 3Family	获取价格
A14100AA-1PG208I	ACTEL	Accelerator Series FPGAs - ACT 3Family	获取价格
A14100AA-1PG208M	ACTEL	Accelerator Series FPGAs - ACT 3Family	获取价格