Datasheet > A1240XL-FCQC

A1240XL-FCQC

更新时间： 2024-01-30 12:23:48

品牌	Logo	应用领域
ACTEL		/
页数	文件大小	规格书
84页	3116K
描述
Integrator Series FPGAs: 1200XL and 3200DX Families

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A1240XL-FCQC 技术参数

是否Rohs认证：	符合	生命周期：	Lifetime Buy
包装说明：	ROHS COMPLIANT, PLASTIC PACKAGE-4	Reach Compliance Code：	compliant
HTS代码：	8541.40.95.00	风险等级：	5.56
其他特性：	UL RECOGNIZED	配置：	SINGLE WITH BUILT-IN RESISTOR
最大正向电流：	0.004 A	最大绝缘电压：	4000 V
元件数量：	1	最大通态电流：	40 A
最高工作温度：	80 °C	最低工作温度：	-40 °C
光电设备类型：	TRIGGER OUTPUT SSR	Base Number Matches：	1

A1240XL-FCQC 数据手册

Integrator Series FPGAs: 1200XL and 3200DX Families

such as FIFOs, LIFOs, and RAM arrays. Additionally, unused

SRAM blocks can be used to implement registers for other

logic within the design.

be joined together at the ends using antifuses to increase

their lengths up to the full length of the track. All

interconnects can be accomplished with a maximum of four

antifuses.

I/O Modules

Horizontal Routing

The I/O modules provide the interface between the device

pins and the logic array. Figure 5 is a block diagram of the

I/O module. A variety of user functions, determined by a

library macro selection, can be implemented in the module

(refer to the Macro Library Guide for more information). I/O

modules contain a tri-state buffer, input and output latches

which can be configured for input, output, or bi-directional

pins (Figure 5).

Horizontal channels are located between the rows of

modules and are composed of several routing tracks. The

horizontal routing tracks within the channel are divided

into one or more segments. The minimum horizontal

segment length is the width of a module pair, and the

maximum horizontal segment length is the full length of the

channel. Any segment that spans more than one-third the

row length is considered a long horizontal segment. A

typical channel is shown in Figure 6. Non-dedicated

horizontal routing tracks are used to route signal nets;

dedicated routing tracks are used for the global clock

networks and for power and ground tie-off tracks.

Vertical Routing

PAD

From Array

Another set of routing tracks run vertically through the

module. Vertical tracks are of three types: input, output, and

long, and are divided into one or more segments. Each

segment in an input track is dedicated to the input of a

particular module; each segment in an output track is

dedicated to the output of a particular module. Long

segments are uncommitted and can be assigned during

routing. Each output segment spans four channels (two

above and two below), except near the top and bottom of the

array where edge effects occur. Long Vertical Tracks contain

either one or two segments. An example of vertical routing

tracks and segments is shown in Figure 6.

G/CLK*

To Array

G/CLK*

* Can be Configured as a Latch or D Flip-Flop

(Using C-Module)

Figure 5 • I/O Module

Segmented

Logic

Horizontal

Modules

The Integrator Series devices contain flexible I/O structures

where each output pin has a dedicated output enable

control. The I/O module can be used to latch input and/or

output data, providing a fast set-up time. In addition, the

Actel Designer Series software tools can build a D-type

flip-flop using a C-module to register input and/or output

signals.

Routing

Tracks

Antifuses

Actel’s Designer Series development tools provide a design

library of I/O macrofunctions which can implement all I/O

configurations supported by the Integrator Series FPGAs.

Vertical Routing Tracks

Routing Structure

Figure 6 • Routing Structure

The Integrator Series architecture uses vertical and

horizontal routing tracks to interconnect the various logic

and I/O modules. These routing tracks are metal

interconnects that may either be of continuous length or

broken into pieces called segments. Varying segment

lengths allows interconnection of over 90% of design tracks

to occur with only two antifuse connections. Segments can

Antifuse Structure

An antifuse is a “normally open” structure as opposed to the

normally closed fuse structure used in PROMs or PALs. The

use of antifuses to implement a programmable logic device

results in highly-testable structures as well as efficient

Discontinued – v3.0

1...5 6 789 10 11...84

中文翻译

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与A1240XL-FCQC相关器件

型号	品牌	获取价格	描述	数据表
A1240XL-FPGB	ACTEL	获取价格	Integrator Series FPGAs: 1200XL and 3200DX Families
A1240XL-FPGC	ACTEL	获取价格	Integrator Series FPGAs: 1200XL and 3200DX Families
A1240XL-FPL84C	ACTEL	获取价格	Field Programmable Gate Array, 684 CLBs, 4000 Gates, 110MHz, 684-Cell, CMOS, PQCC84, PLAST
A1240XL-FPL84C	MICROSEMI	获取价格	Field Programmable Gate Array, 110MHz, 684-Cell, CMOS, PQCC84,
A1240XL-FPL84I	MICROSEMI	获取价格	Field Programmable Gate Array, 684-Cell, CMOS, PQCC84,
A1240XL-FPLB	ACTEL	获取价格	Integrator Series FPGAs: 1200XL and 3200DX Families
A1240XL-FPLC	ACTEL	获取价格	Integrator Series FPGAs: 1200XL and 3200DX Families
A1240XL-FPLG84C	ACTEL	获取价格	Field Programmable Gate Array, 110MHz, 684-Cell, CMOS, PQCC84
A1240XL-FPQ100C	MICROSEMI	获取价格	Field Programmable Gate Array, 110MHz, 684-Cell, CMOS, PQFP100,
A1240XL-FPQ100I	MICROSEMI	获取价格	Field Programmable Gate Array, 684-Cell, CMOS, PQFP100,

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