Datasheet > A1020B-2PL44C

A1020B-2PL44C

更新时间： 2024-02-18 09:04:51

品牌	Logo	应用领域
美高森美 - MICROSEMI		时钟栅可编程逻辑
页数	文件大小	规格书
24页	159K
描述
Field Programmable Gate Array, 547 CLBs, 2000 Gates, 60MHz, 547-Cell, CMOS, PQCC44, PLASTIC, LCC-44

阅读下载

中文翻译

获取价格

技术参数
数据手册
替代型号

如果您发现信息不准确，欢迎纠错

A1020B-2PL44C 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	PLASTIC, MS-007-AB, LCC-44	Reach Compliance Code：	compliant
风险等级：	5.83	其他特性：	MAX 34 I/OS
最大时钟频率：	60 MHz	CLB-Max的组合延迟：	3.4 ns
JESD-30 代码：	S-PQCC-J44	JESD-609代码：	e0
长度：	16.51 mm	湿度敏感等级：	3
可配置逻辑块数量：	547	等效关口数量：	2000
输入次数：	69	逻辑单元数量：	547
输出次数：	69	端子数量：	44
最高工作温度：	70 °C	最低工作温度：
组织：	547 CLBS, 2000 GATES	封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装等效代码：	LDCC44,.7SQ
封装形状：	SQUARE	封装形式：	CHIP CARRIER
峰值回流温度（摄氏度）：	225	电源：	5 V
可编程逻辑类型：	FIELD PROGRAMMABLE GATE ARRAY	认证状态：	Not Qualified
座面最大高度：	4.445 mm	子类别：	Field Programmable Gate Arrays
最大供电电压：	5.25 V	最小供电电压：	4.75 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	16.51 mm
Base Number Matches：	1

A1020B-2PL44C 数据手册

™

A C T

1 S e r i e s F P G A s

P a c k a g e T h e r m a l C h a r a c t e r i s t i c s

A sample calculation of the maximum power dissipation for

an 84-pin plastic leaded chip carrier at commercial

temperature is as follows:

The device junction to case thermal characteristics is

θjc, and the junction to ambient air characteristics is θja. The

thermal characteristics for θja are shown with two different

air flow rates. Maximum junction temperature is 150°C.

Max junction temp.(°C) – Max commercial temp.(°C)

150°C – 70°C

37°C ⁄ W

------------------------------------------------------------------------------------------------------------------------------------------------- = ---------------------------------- = 2.2 W

θja(°C ⁄ W)

θja

Still Air

θja

300 ft/min

Package Type

Pin Count

θjc

Units

°C/W

Plastic J-Leaded Chip Carrier

Plastic Quad Flatpack

100

°C/W

Very Thin (1.0 mm) Quad Flatpack

Ceramic Pin Grid Array

Ceramic Quad Flatpack

G e n e r a l P o w e r E q u a t i o n

The power due to standby current is typically a small

component of the overall power. Standby power is calculated

below for commercial, worst case conditions.

P = [I_CCstandby + I_CCactive] * V + I_OL* V * N + I_OH

(V – V ) * M

I_CC

Power

Where:

3 mA

5.25 V

3.60 V

3.30 V

15.75 mW (max)

5.25 mW (typ)

2.70 mW (max)

0.99 mW (typ)

I_CCstandby is the current flowing when no inputs or

outputs are changing.

1 mA

0.75 mA

0.30 mA

I_CCactive is the current flowing due to CMOS switching.

I_OL, I_OHare TTL sink/source currents.

Ac t iv e P o w e r C o m p o n e n t

V , V_OHare TTL level output voltages.

N equals the number of outputs driving TTL loads to

Power dissipation in CMOS devices is usually dominated by

the active (dynamic) power dissipation. This component is

frequency dependent, a function of the logic and the

V .

M equals the number of outputs driving TTL loads to

V .

external I/O. Active power dissipation results from charging

internal chip capacitances of the interconnect,

unprogrammed antifuses, module inputs, and module

outputs, plus external capacitance due to PC board traces

and load device inputs. An additional component of the active

power dissipation is the totem-pole current in CMOS

transistor pairs. The net effect can be associated with an

equivalent capacitance that can be combined with frequency

and voltage to represent active power dissipation.

An accurate determination of N and M is problematical

because their values depend on the family type, design

details, and on the system I/O. The power can be divided into

two components: static and active.

S t a t ic P o w e r C o m p o n e n t

Actel FPGAs have small static power components that result

in lower power dissipation than PALs or PLDs. By integrating

multiple PALs/PLDs into one FPGA, an even greater

reduction in board-level power dissipation can be achieved.

1 -2 8 9

1...4 5 678 9 10...24

中文翻译

下载PDF

A1020B-2PL44C 替代型号

型号	品牌	替代类型	描述	数据表
A1020B-1PL44C	MICROSEMI	完全替代	Field Programmable Gate Array, 547 CLBs, 2000 Gates, 53MHz, 547-Cell, CMOS, PQCC44, PLASTI
A40MX02-2PL44	MICROSEMI	完全替代	Field Programmable Gate Array, 295 CLBs, 3000 Gates, 101MHz, 295-Cell, CMOS, PQCC44, PLAST

与A1020B-2PL44C相关器件

型号	品牌	获取价格	描述	数据表
A1020B-2PL44I	MICROSEMI	获取价格	Field Programmable Gate Array, 547 CLBs, 2000 Gates, 54.1MHz, 547-Cell, CMOS, PQCC44, PLAS
A1020B-2PL44I	ACTEL	获取价格	Field Programmable Gate Array, 547 CLBs, 2000 Gates, 54.1MHz, 547-Cell, CMOS, PQCC44, PLAS
A1020B-2PL68C	MICROSEMI	获取价格	Field Programmable Gate Array, 547 CLBs, 2000 Gates, 60MHz, 547-Cell, CMOS, PQCC68, PLASTI
A1020B-2PL68C	ACTEL	获取价格	Field Programmable Gate Array, 547 CLBs, 2000 Gates, 60MHz, 547-Cell, CMOS, PQCC68, PLASTI
A1020B-2PL68I	MICROSEMI	获取价格	Field Programmable Gate Array, 547 CLBs, 2000 Gates, 54.1MHz, 547-Cell, CMOS, PQCC68, PLAS
A1020B-2PL68I	ACTEL	获取价格	Field Programmable Gate Array, 547 CLBs, 2000 Gates, 54.1MHz, 547-Cell, CMOS, PQCC68, PLAS
A1020B-2PL84B	ACTEL	获取价格	ACT 1 Series FPGAs
A1020B-2PL84C	ACTEL	获取价格	ACT 1 Series FPGAs
A1020B-2PL84C	MICROSEMI	获取价格	Field Programmable Gate Array, 547 CLBs, 2000 Gates, 60MHz, 547-Cell, CMOS, PQCC84, PLASTI
A1020B-2PL84I	ACTEL	获取价格	ACT 1 Series FPGAs

与A1020B-2PL44C相关文章

压敏电阻器在直流电路中的过压保护应用探讨
2024-06-07

2
电感耐压值及其与电感大小的关系
2024-06-07

5
CNY17F光耦合器：特性、应用、封装、引脚功能及替换型号解析
2024-06-07

4
DS1307资料解析：特性、引脚说明、替代推荐
2024-06-07

3

产品中心

服务支持

精选活动

关于我们

帮助中心

A1020B-2PL44C

A1020B-2PL44C 技术参数

A1020B-2PL44C 数据手册

A1020B-2PL44C 替代型号

与A1020B-2PL44C相关器件

与A1020B-2PL44C相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

A1020B-2PL44C

A1020B-2PL44C 技术参数

A1020B-2PL44C 数据手册

A1020B-2PL44C 替代型号

与A1020B-2PL44C相关器件

与A1020B-2PL44C相关文章

您还可以找

您在本页遇到什么问题？