5秒后页面跳转
9FGP205AKLFT PDF预览

9FGP205AKLFT

更新时间: 2024-02-24 10:48:48
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
18页 257K
描述
Frequency Timing Generator for Peripherals

9FGP205AKLFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:VFQFPN
包装说明:HVQCCN, LCC40,.24SQ,20针数:40
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:4.51
Samacsys Description:VFQFP-N 6.0 X 6.0 X 0.9 MM - NO LEADJESD-30 代码:S-PQCC-N40
JESD-609代码:e3长度:6 mm
湿度敏感等级:3端子数量:40
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:400 MHz封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC40,.24SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:3.3 V
主时钟/晶体标称频率:25 MHz认证状态:Not Qualified
座面最大高度:1 mm子类别:Clock Generators
最大压摆率:225 mA最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:6 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC

9FGP205AKLFT 数据手册

 浏览型号9FGP205AKLFT的Datasheet PDF文件第10页浏览型号9FGP205AKLFT的Datasheet PDF文件第11页浏览型号9FGP205AKLFT的Datasheet PDF文件第12页浏览型号9FGP205AKLFT的Datasheet PDF文件第14页浏览型号9FGP205AKLFT的Datasheet PDF文件第15页浏览型号9FGP205AKLFT的Datasheet PDF文件第16页 
9FGP205  
Advance Information  
Frequency Timing Generator for Peripherals  
SMBus Table: CPU Frequency Select and Spread Spectrum Control Register  
Byte 0  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Pin #  
Name  
WOL_STOP_EN  
Reserved  
Control Function  
Enables 25M in Power Down  
Reserved  
Type  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0
1
PWD  
-
-
-
-
-
-
-
-
Disable  
Enabled  
1
0
0
0
0
1
0
1
Reserved  
Reserved  
Disable Enable  
Reserved  
Reserved  
DOT96 SS_EN  
CPU SS_EN  
CPU FS2  
DOT96 Spread Spectrum Enable  
CPU Spread Spectrum Enable  
CPU Freq Select Bit 2  
CPU Freq Select Bit 1  
CPU Freq Select Bit 0  
See Table 1:  
CPU Frequency Selection  
Table  
CPU FS1  
CPU FS0  
SMBus Table: RMII Output Control Register  
Byte 1  
Bit 7  
Pin #  
24  
Name  
RMII_5 Enable  
Control Function  
RMII_7 Output Control  
Type  
RW  
0
1
PWD  
1
Disable  
Enable  
25  
28  
29  
32  
33  
36  
37  
RMII_4 Enable  
RMII_3 Enable  
RMII_2 Enable  
RMII_1 Enable  
RMII_0 Enable  
RGMII_1 Enable  
RGMII_0 Enable  
RMII_6 Output Control  
RMII_5 Output Control  
RMII_4 Output Control  
RMII_3 Output Control  
RMII_2 Output Control  
RGMII_1 Output Control  
RGMII_0 Output Control  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
Disable  
Disable  
Disable  
Disable  
Disable  
Disable  
Disable  
Enable  
Enable  
Enable  
Enable  
Enable  
Enable  
Enable  
1
1
1
1
1
1
1
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
SMBus Table: DOT, CPU, 32.768KHz, 25MHz and 33.33MHz Outputs Control Register  
Byte 2  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Pin #  
7,8  
3,4  
22  
17  
16  
13  
6
Name  
Control Function  
Driven in power down  
Driven in power down  
33.33MHz Output Control  
25MHz_1 Output Control  
25MHz_0 Output Control  
32.768KHz Output Control  
CPUCLK Output Control  
DOT96SS Output Control  
Type  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0
1
Hi-Z  
Hi-Z  
Enable  
Enable  
Enable  
Enable  
Enable  
Enable  
PWD  
CPUCLK PD Drive Mode  
DOT96SS PD Drive Mode  
33.33MHz Enable  
25MHz_1 Enable  
Driven  
Driven  
Disable  
Disable  
Disable  
Disable  
Disable  
Disable  
1
1
1
1
1
1
1
1
25MHz_0 Enable  
32.768kHz Enable  
CPUCLK Enable  
5
DOT96SS Enable  
SMBus Table: DOT96 Frequency Select and Spread Spectrum Control Register  
Byte 3  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Pin #  
Name  
Control Function  
Type  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0
1
PWD  
24  
25  
28  
29  
-
-
-
-
RMII_5 WOL_STOP  
RMII_4 WOL_STOP  
RMII_3 WOL_STOP  
RMII_2 WOL_STOP  
DOT96SS FS3  
RMII_5 runs in power down  
RMII_4 runs in power down  
RMII_3 runs in power down  
RMII_2 runs in power down  
DOT96 Freq Select Bit 3  
DOT96 Freq Select Bit 2  
DOT96 Freq Select Bit 1  
DOT96 Freq Select Bit 0  
Off  
Off  
Off  
Off  
Runs  
Runs  
Runs  
Runs  
0
0
0
1
0
0
0
0
See Table 2:  
DOT96SS FS2  
DOT96SS FS1  
DOT96SS FS0  
DOT Frequency Selection  
Table  
SMBus Table: RMII Strength Control Register  
Byte 4  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Pin #  
24  
25  
28  
29  
32  
33  
32  
33  
Name  
RMII_5 Str  
RMII_4 Str  
RMII_3 Str  
RMII_2 Str  
Control Function  
RMII_5 Strength Control  
RMII_4 Strength Control  
RMII_3 Strength Control  
RMII_2 Strength Control  
RMII_1 Strength Control  
RMII_0 Strength Control  
RMII_1 runs in power down  
RMII_0 runs in power down  
Type  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0
1
PWD  
1-Load (1X) 2-Loads (2X)  
1-Load (1X) 2-Loads (2X)  
1-Load (1X) 2-Loads (2X)  
1-Load (1X) 2-Loads (2X)  
1-Load (1X) 2-Loads (2X)  
1-Load (1X) 2-Loads (2X)  
0
0
0
0
0
0
1
1
RMII_1 Str  
RMII_0 Str  
RMII_1 WOL_STOP  
RMII_0 WOL STOP  
Off  
Off  
Runs  
Runs  
IDT® Frequency Timing Generator for Peripherals  
1664—05/14/10  
13  

9FGP205AKLFT 替代型号

型号 品牌 替代类型 描述 数据表
9FGP205AKLF IDT

完全替代

Frequency Timing Generator for Peripherals

与9FGP205AKLFT相关器件

型号 品牌 获取价格 描述 数据表
9FGU0231 IDT

获取价格

2 O/P 1.5V PCIe Gen1-2-3 Clock Generator
9FGU0231 RENESAS

获取价格

2-output 1.5 V PCIe Gen1-2-3 Clock Generator
9FGU0231_16 IDT

获取价格

2 O/P 1.5V PCIe Gen1-2-3 Clock Generator
9FGU0231AKILF IDT

获取价格

2 O/P 1.5V PCIe Gen1-2-3 Clock Generator
9FGU0231AKILFT IDT

获取价格

2 O/P 1.5V PCIe Gen1-2-3 Clock Generator
9FGU0231AKLF IDT

获取价格

2 O/P 1.5V PCIe Gen1-2-3 Clock Generator
9FGU0231AKLFT IDT

获取价格

2 O/P 1.5V PCIe Gen1-2-3 Clock Generator
9FGU0241 IDT

获取价格

2 O/P 1.5V PCIe Gen1-2-3 Clock Generator
9FGU0241 RENESAS

获取价格

2-output 1.5 V PCIe Gen1-2-3 Clock Generator with Zo=100 ohms
9FGU0241_16 IDT

获取价格

2 O/P 1.5V PCIe Gen1-2-3 Clock Generator