Datasheet > 9FG104YFT

9FG104YFT

更新时间： 2023-07-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
17页	238K
描述
Processor Specific Clock Generator, 400MHz, PDSO28, 0.209 INCH, MO-150N, SSOP-28

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9FG104YFT 数据手册

ICS9FG104

Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA

SMBus Table: Device Control Register, READ/WRITE ADDRESS (DC/DD)

Byte 0

Pin #

Name

Control Function

Type

PWD

Pin 17

Pin 6

FS3¹

FS2¹

FS1¹

FS0¹

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

See Frequency Selection Table,

Page 1

Pin 24

Pin 25

Pin 16

Spread Enable¹

Off

Enable Software Control of Frequency, Spread Enable

(Spread Type always Software Control)

RW Hardware Select Software Select

Bit 2

DIF_STOP# drive mode

SPREAD TYPE

Driven

Down

Hi-Z

Bit 1

Bit 0

Center

Notes:

1. These bits reflect the state of the corresponding pins at power up, but may be written to

if Byte 0, bit 2 is set to '1'. FS3 is the SEL14M_25M# pin.

SMBus Table: Output Enable Register

Byte 1

Pin #

Name

Control Function

Reserved

Type

PWD

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

DIF_3 EN

DIF_2 EN

Output Enable

Disable

Enable

Reserved

Output Enable

Reserved

DIF_1 EN

DIF_0 EN

Disable

Enable

SMBus Table: Output Stop Control Register

Byte 2

Pin #

Name

Control Function

Reserved

Type

PWD

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

DIF_3 STOP EN

DIF_2 STOP EN

Free Run/ Stop Enable

Free-run

Stop-able

Reserved

Free Run/ Stop Enable

DIF_1 STOP EN

DIF_0 STOP EN

Free-run

Stop-able

Reserved

IDT^TM/ICS^TMFrequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA

0839O—12/03/08

1 2 3 456 7 8...17

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