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9ERS3165BGILF PDF预览

9ERS3165BGILF

更新时间: 2024-02-25 22:32:52
品牌 Logo 应用领域
艾迪悌 - IDT 晶体时钟发生器微控制器和处理器外围集成电路光电二极管PC
页数 文件大小 规格书
27页 423K
描述
Embedded 64-Pin Industrial Temperature Range CK505 Compatible Clock

9ERS3165BGILF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:VFQFPN
包装说明:,针数:64
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.81
JESD-609代码:e3湿度敏感等级:3
峰值回流温度(摄氏度):260技术:CMOS
端子面层:Matte Tin (Sn)处于峰值回流温度下的最长时间:NOT SPECIFIED
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

9ERS3165BGILF 数据手册

 浏览型号9ERS3165BGILF的Datasheet PDF文件第18页浏览型号9ERS3165BGILF的Datasheet PDF文件第19页浏览型号9ERS3165BGILF的Datasheet PDF文件第20页浏览型号9ERS3165BGILF的Datasheet PDF文件第22页浏览型号9ERS3165BGILF的Datasheet PDF文件第23页浏览型号9ERS3165BGILF的Datasheet PDF文件第24页 
ICS9ERS3165  
Embedded 64-Pin Industrial Temperature Range CK505 Compatible Clock  
Byte 12 Byte Count Register  
Bit  
7
Name  
Reserved  
Reserved  
BC5  
Description  
Reserved  
Reserved  
Type  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
Default  
0
0
0
0
1
1
0
1
6
5
BC4  
BC3  
4
Read Back byte count register,  
max bytes = 32  
3
BC2  
BC1  
2
1
BC0  
0
Byte 13 Single Ended Output Slew Rate Control Register  
Bit  
Name  
Description  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0
1
Default  
REF  
00 = Hi-Z  
10 = 2.0 V/ns  
00 = Hi-Z  
10 = 2.0 V/ns  
00 = Hi-Z  
10 = 2.0 V/ns  
-
01 = 1.4 V/ns  
11 = 2.4 V/ns  
01 = 1.4 V/ns  
11 = 2.4 V/ns  
01 = 1.4 V/ns  
11 = 2.4 V/ns  
-
0
1
0
1
0
1
0
0
7
Slew Rate Control  
REF  
6
27M_FIX  
27M_FIX  
27M_SS  
27M_SS  
Reserved  
Reserved  
5
Slew Rate Control  
Slew Rate Control  
4
3
2
Reserved  
Reserved  
1
-
-
0
Byte 14 Reserved  
Bit  
7
Name  
Description  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Type  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
Default  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
X
X
X
X
X
X
X
X
6
5
4
3
2
1
0
Byte 15 Reserved  
Default  
Bit  
7
Name  
Description  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Type  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
X
X
X
X
X
X
X
X
6
5
4
3
2
1
0
Byte 16 Reserved  
Default  
Bit  
7
Name  
Description  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Type  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
X
X
X
X
X
X
X
X
6
5
4
3
2
1
0
Byte 17 SRC Output Control Register  
Bit  
Name  
Description  
RW  
0
1
Default  
Stops with PCI_STOP#  
assertion  
SATA/SRC2_STP_CRTL  
If set, SATA/SRC2 stops with PCI_STOP#  
RW  
Free Running  
0
7
Stops with PCI_STOP#  
assertion  
Stops with PCI_STOP#  
assertion  
Stops with PCI_STOP#  
assertion  
SRC3_STP_CRTL  
SRC4_STP_CRTL  
SRC6_STP_CRTL  
If set, SRC3 stops with PCI_STOP#  
If set, SRC4 stops with PCI_STOP#  
If set, SRC6 stops with PCI_STOP#  
RW  
RW  
RW  
Free Running  
Free Running  
Free Running  
0
0
0
6
5
4
Stops with PCI_STOP#  
assertion  
SRC7_STP_CRTL  
Reserved  
If set, SRC7 stops with PCI_STOP#  
Reserved  
RW  
RW  
RW  
Free Running  
0
0
0
3
2
-
-
Stops with PCI_STOP#  
assertion  
SRC8_STP_CRTL  
If set, SRC8 stops with PCI_STOP#  
Free Running  
1
0
Stops with PCI_STOP#  
assertion  
SRC9_STP_CRTL  
If set, SRC9 stops with PCI_STOP#  
RW  
Free Running  
0
IDT® Embedded 64-Pin Industrial Temperature Range CK505 Compatible Clock  
1613C—02/08/12  
21  

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