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9ERS3165BGILF

更新时间： 2024-01-30 10:25:05

品牌	Logo	应用领域
艾迪悌 - IDT		晶体时钟发生器微控制器和处理器外围集成电路光电二极管 PC
页数	文件大小	规格书
27页	423K
描述
Embedded 64-Pin Industrial Temperature Range CK505 Compatible Clock

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技术参数
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9ERS3165BGILF 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	VFQFPN
包装说明：	,	针数：	64
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.81
JESD-609代码：	e3	湿度敏感等级：	3
峰值回流温度（摄氏度）：	260	技术：	CMOS
端子面层：	Matte Tin (Sn)	处于峰值回流温度下的最长时间：	NOT SPECIFIED
uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, PROCESSOR SPECIFIC	Base Number Matches：	1

9ERS3165BGILF 数据手册

ICS9ERS3165

Embedded 64-Pin Industrial Temperature Range CK505 Compatible Clock

TSSOP Pin Description

Pin# Pin Name

Type DESCRIPTION

3.3V PCI clock output or Clock Request control A for either SRC0 or SRC2 pair

The power-up default is PCI0 output, but this pin may also be used as a Clock

Request control of SRC pair 0 or SRC pair 2 via SMBus. Before configuring this

pin as a Clock Request Pin, the PCI output must first be disabled in byte 2, bit 0

of SMBus address space . After the PCI output is disabled (high-Z), the pin can

then be set to serve as a Clock Request pin for either SRC pair 2 or pair 0 using

the CR#_A_EN bit located in byte 5 of SMBUs address space.

Byte 5, bit 7

PCI0/CR#_A

I/O

0 = PCI0 enabled (default)

1= CR#_A enabled.

Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair

Byte 5, bit 6

0 = CR#_A controls SRC0 pair (default),

1= CR#_A controls SRC2 pair

VDDPCI

PWR Power supply pin for the PCI outputs, 3.3V nominal

3.3V PCI clock output/Clock Request control B for either SRC1 or SRC4 pair

The power-up default is PCI1 output, but this pin may also be used as a Clock

Request control of SRC pair 1 or SRC pair 4 via SMBus. Before configuring this

pin as a Clock Request Pin, the PCI output must first be disabled in byte 2, bit 1

of SMBus address space . After the PCI output is disabled (high-Z), the pin can

then be set to serve as a Clock Request pin for either SRC pair 1 or pair 4 using

the CR#_B_EN bit located in byte 5 of SMBUs address space.

PCI1/CR#_B

I/O

Byte 5, bit 5

0 = PCI1 enabled (default)

1= CR#_B enabled.

Byte 5, bit 4 controls whether CR#_B controls SRC1 or SRC4 pair

Byte 5, bit 4

0 = CR#_B controls SRC1 pair (default)

1= CR#_B controls SRC4 pair

3.3V PCI clock output / Trusted Mode Enable (TME) Latched Input. This pin is

sampled on power-up as follows

PCI2/TME

I/O 0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed

After being sampled on power-up, this pin becomes a 3.3V PCI Output

OUT 3.3V PCI clock output.

PCI3

3.3V PCI clock output / 27MH mode select for pin17, 18 strap. On powerup, the

I/O logic value on this pin determines the power-up default of DOT_96/SRC0 and

27MHz/SRC1 output and the function table for the pin17 and pin18.

Free running PCI clock output and ITP/SRC8 enable strap. This output is not

affected by the state of the PCI_STOP# pin. On powerup, the state of this pin

I/O determines whether pins 46 and 47 are an ITP or SRC pair.

0 =SRC8/SRC8#

PCI4/27_SEL

PCI5_F/ITP_EN

1 = ITP/ITP#

GNDPCI

VDD48

PWR Ground for PCI clocks.

PWR Power supply for USB clock, nominal 3.3V.

Fixed 48MHz USB clock output. 3.3V./ 3.3V tolerant input for CPU frequency

10 USB48M/FSLA

I/O

selection. Refer to input electrical characteristics for Vil_FS and Vih_FS values.

11 GND48

PWR Ground pin for the 48MHz outputs.

12 VDDI/O96MHz

PWR 1.05V to 3.3V from external power supply

True clock of SRC or DOT96. The power-up default function depends on

13 DOT96T/SRCT_LR0

14 DOT96C/SRCC_LR0

OUT

27_Select,1= SRC0, 0=DOT96

Complement clock of SRC or DOT96. The power-up default function depends

OUT

on 27_Select,1= SRC0, 0=DOT96

15 GND

16 VDD

PWR Ground pin for the DOT96 clocks.

PWR Power supply for SRC / SE1 and SE2 clocks, 3.3V nominal.

IDT^®Embedded 64-Pin Industrial Temperature Range CK505 Compatible Clock

1613C—02/08/12

123 4 5 6 7...27

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与9ERS3165BGILF相关器件

型号	品牌	描述	获取价格	数据表
9ERS3165BGILFT	IDT	Embedded 64-Pin Industrial Temperature Range CK505 Compatible Clock	获取价格
9ERS3165BKILF	IDT	Embedded 64-Pin Industrial Temperature Range CK505 Compatible Clock	获取价格
9ERS3165BKILFT	IDT	Embedded 64-Pin Industrial Temperature Range CK505 Compatible Clock	获取价格
9EX21501A	IDT	15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux	获取价格
9EX21501AKILF	IDT	15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux	获取价格
9EX21501AKILFT	IDT	15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux	获取价格

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