9DB233
Two Output Differential Buffer for PCIe Gen3
Datasheet
Electrical Characteristics - Clock Input Parameters
TA = TCOM or TIND; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
VIHDIF
CONDITIONS
MIN
600
TYP
800
MAX
1150
UNITS NOTES
Differential inputs
(single-ended measurement)
Differential inputs
Input High Voltage - DIF_IN
mV
mV
mV
1
1
1
Input Low Voltage - DIF_IN
VILDIF
VCOM
VSS - 300
300
0
300
(single-ended measurement)
Input Common Mode
Voltage - DIF_IN
Common Mode Input Voltage
1000
Input Amplitude - DIF_IN
Input Slew Rate - DIF_IN
Input Leakage Current
VSWING
dv/dt
IIN
Peak to Peak value
Measured differentially
300
0.4
-5
1450
8
mV
V/ns
uA
1
1,2
1
VIN = VDD , VIN = GND
5
Input Duty Cycle
dtin
Measurement from differential wavefrom
Differential Measurement
45
0
55
125
%
1
Input Jitter - Cycle to Cycle
JDIFIn
ps
1
1 Guaranteed by design and characterization, not 100% tested in production.
2Slew rate measured through +/-75mV window centered around differential zero
Electrical Characteristics - DIF 0.7V Current Mode Differential Outputs
TA = TCOM or TIND; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS NOTES
Slew rate
Slew rate matching
Trf
∆Trf
Scope averaging on
Slew rate matching, Scope averaging on
0.6
2.5
9.5
4
20
V/ns 1, 2, 3
%
1, 2, 4
Statistical measurement on single-ended signal
using oscilloscope math function. (Scope averaging
on)
Voltage High
Voltage Low
VHigh
VLow
660
740
8
850
1
mV
-150
150
1
Measurement on single ended signal using absolute
value. (Scope averaging off)
Scope averaging off
Max Voltage
Min Voltage
Vswing
Vmax
Vmin
Vswing
760
-3
1150
1
mV
-300
300
250
1
1506
378
54
mV
mV
mV
1, 2
1, 5
1, 6
Crossing Voltage (abs)
Crossing Voltage (var)
Vcross_abs
∆-Vcross
Scope averaging off
Scope averaging off
550
140
1Guaranteed by design and characterization, not 100% tested in production. IREF = VDD/(3xRR). For RR = 475Ω (1%), IREF = 2.32mA. IOH
=
6 x IREF and VOH = 0.7V @ ZO=50Ω (100Ω differential impedance).
2 Measured from differential waveform
3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around
differential 0V.
4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on the
average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope is to use for the edge rate calculations.
5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising edge (i.e.
Clock rising and Clock# falling).
6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of V_cross_min/max (V_cross absolute)
allowed. The intent is to limit Vcross induced modulation by setting V_cross_delta to be smaller than V_cross absolute.
Electrical Characteristics - Current Consumption
TA = TCOM or TIND; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
IDD3.3OP
CONDITIONS
MIN
TYP
70
MAX
UNITS NOTES
Operating Supply Current
All outputs active @100MHz, CL = Full load;
All diff pairs driven
All differential pairs tri-stated
mA
mA
mA
1
80
IDD3.3PD
IDD3.3PDZ
N/A
N/A
1
1
Powerdown Current
1Guaranteed by design and characterization, not 100% tested in production.
IDT® Two Output Differential Buffer for PCIe Gen3
1667C—04/20/11
5
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