Datasheet > 9DB108FT

9DB108FT

更新时间： 2024-02-29 01:00:54

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
15页	109K
描述
Clock Driver

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

9DB108FT 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
Reach Compliance Code：	unknown	风险等级：	5.92
Base Number Matches：	1

9DB108FT 数据手册

Integrated

Circuit

ICS9DB108

Systems, Inc.

Electrical Characteristics - DIF 0.7V Current Mode Differential Pair

T_A= 0 - 70°C; V_DD= 3.3 V +/-5%; C_L=2pF, R_S=33.2Ω, R_P=49.9Ω, Ι_REF= 475Ω

PARAMETER

SYMBOL

Zo¹

CONDITIONS

V_O= V_x

MIN

TYP

MAX

850

UNITS NOTES

Current Source Output

Impedance

3000

Ω

Statistical measurement on single

ended signal using oscilloscope

math function.

Voltage High

Voltage Low

VHigh

VLow

660

1,3

-150

150

Measurement on single ended

signal using absolute value.

Max Voltage

Min Voltage

Crossing Voltage (abs)

Vovs

Vuds

Vcross(abs)

1150

-300

250

550

140

Variation of crossing over all

edges

see Tperiod min-max values

200MHz nominal

Crossing Voltage (var)

Long Accuracy

d-Vcross

ppm

1,2

4.9985

5.9982

7.4978

9.9970

4.8735

5.8732

7.3728

9.8720

175

5.0015

5.0266

6.0018

6.0320

7.5023

5.4000

10.0030

10.0533

200MHz spread

166.66MHz nominal

166.66MHz spread

133.33MHz nominal

133.33MHz spread

100.00MHz nominal

100.00MHz spread

Average period

Tperiod

200MHz nominal

166.66MHz nominal/spread

133.33MHz nominal/spread

100.00MHz nominal/spread

V_OL= 0.175V, V_OH= 0.525V

T_absmin

Absolute min period

t_r

Rise Time

Fall Time

700

125

t_f

V_OH= 0.525V V_OL= 0.175V

175

d-t_r

d-t_f

Rise Time Variation

Fall Time Variation

Measurement from differential

wavefrom

d_t3

Duty Cycle

Skew

t_sk3

V_T= 50%

PLL mode,

Measurement from differential

wavefrom

BYPASS mode as additive jitter

t_jcyc-cyc

Jitter, Cycle to cycle

¹Guaranteed by design and characterization, not 100% tested in production.

²All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that the input clock

complies with CK409/CK410 accuracy requirements

³I_REF= V_DD/(3xR_R). For R_R= 475Ω (1%), I_REF= 2.32mA. I_OH= 6 x I_REFand V_OH= 0.7V @ Z_O=50Ω.

0723D—01/08/04

1...3 4 567 8 9...15

下载PDF

与9DB108FT相关器件

型号	品牌	描述	获取价格	数据表
9DB108GLFT	IDT	Clock Driver, PDSO48	获取价格
9DB108GLNT	IDT	Clock Driver, PDSO48	获取价格
9DB108GT	IDT	Clock Driver	获取价格
9DB108YFLFT	IDT	PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, ROHS C	获取价格
9DB108YFLNT	IDT	PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, ROHS C	获取价格
9DB108YFT	IDT	PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, MO-118	获取价格