Datasheet > 9DB108YGT

9DB108YGT

更新时间： 2024-01-16 21:50:46

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
16页	144K
描述
PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-48

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9DB108YGT 数据手册

Integrated

Circuit

Systems, Inc.

ICS9DB108

(Not recommended for new designs)

Eight Output Differential Buffer for PCI-Express

Recommended Application:

Pin Configuration

DB800 Intel Yellow Cover part with PCI-Express support.

SRC_DIV#

VDD

48 VDDA

47 GNDA

Output Features:

GND

IREF

•

8 - 0.7V current-mode differential output pairs

Supports zero delay buffer mode and fanout mode

Bandwidth programming available

SRC_IN

SRC_IN#

OE_0

45 LOCK

44 OE_7

43 OE_4

39 VDD

36 OE_6

35 OE_5

32 GND

31 VDD

OE_3

DIF_7

DIF_7#

GND

Key Specifications:

DIF_0

DIF_0#

GND

VDD

DIF_1

DIF_1#

•

Outputs cycle-cycle jitter < 50ps

Outputs skew: 50ps

+/- 300ppm frequency accuracy on output clocks

DIF_6

DIF_6#

Features/Benefits:

•

Supports tight ppm accuracy clocks for Serial-ATA

Spread spectrum modulation tolerant, 0 to -0.5% down

spread and +/- 0.25% center spread

OE_1 14

OE_2 15

DIF_5

DIF_5#

DIF_2

DIF_2#

GND

VDD

DIF_3

DIF_3#

•

Supports undriven differential output pair in PD# and

SRC_STOP# for power management.

DIF_4

DIF_4#

28 HIGH_BW#

27 SRC_STOP#

26 PD#

BYPASS#/PLL

SCLK

25 GND

SDATA

48-pin SSOP & TSSOP

0723G—12/02/08

12 3 4 5 6 7...16

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