Datasheet > 97SD3248BRPQK

97SD3248BRPQK

更新时间： 2024-01-16 23:58:57

品牌	Logo	应用领域
麦斯威 - MAXWELL		动态存储器内存集成电路
页数	文件大小	规格书
40页	501K
描述
Synchronous DRAM, 32MX48, 6ns, CMOS, PQFP132, QFP-132

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技术参数
数据手册

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97SD3248BRPQK 技术参数

生命周期：	Transferred	包装说明：	QFF,
Reach Compliance Code：	unknown	风险等级：	5.7
访问模式：	FOUR BANK PAGE BURST	最长访问时间：	6 ns
其他特性：	AUTO/SELF REFRESH	JESD-30 代码：	S-PQFP-F132
长度：	34.29 mm	内存密度：	1610612736 bit
内存集成电路类型：	SYNCHRONOUS DRAM	内存宽度：	48
功能数量：	1	端口数量：	1
端子数量：	132	字数：	33554432 words
字数代码：	32000000	工作模式：	SYNCHRONOUS
最高工作温度：	125 °C	最低工作温度：	-55 °C
组织：	32MX48	封装主体材料：	PLASTIC/EPOXY
封装代码：	QFF	封装形状：	SQUARE
封装形式：	FLATPACK	座面最大高度：	9.7028 mm
自我刷新：	YES	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	MILITARY	端子形式：	FLAT
端子节距：	0.635 mm	端子位置：	QUAD
总剂量：	100k Rad(Si) V	宽度：	34.29 mm
Base Number Matches：	1

97SD3248BRPQK 数据手册

97SD3248B

1.5Gb (8-Meg X 48-Bit X 4-Banks) SDRAM

Pin Functions:

CLK (INPUT PIN): CLK is the master clock input to this pin. The other input signals are referred at CLK rising

edge.

CS 1-6 (INPUT PINS): When CS 1-6 are low, the command input cycle becomes valid. When CS 1-6 are High,

all inputs are ignored. However, internal operations (bank active, burst operations, etc.) are held.

RAS, CAS AND WE (INPUT PINS): Although these pin names are the same as those of conventional DRAMs,

they function in a different way. These pins define operation commands (read, write, etc.) depending on the

combination of their voltage levels.

A0 ^TOA12 (INPUT PINS): Row address (AX0 to AX12) is determined by A0 to A12 level at the bank active

command cycle CLK rising edge. Column address (AY0 to AY9) is determined by A0 to A9 level at the read

or write command cycle CLK rising edge. And this column address becomes burst access start address.

A10 defines the precharge mode. When A10 = High at the precharge command cycle, all banks are pre-

charged. But when A10 = Low at the precharge command cycle, only the bank that is selected by BA0/BA1

(BS) is pre charged.

BA0/BA1 (^{INPUT PINS}): BA0/BA1 are bank select signals (BS). The memory array of the 97SD3248 is divided

into bank 0, bank 1, bank 2 and bank 3. The 97SD3248B contains 8192-row X 1024-column X 48-bit. If BA0

and BA1 is Low, bank 0 is selected. If BA0 is Low and BA1 is High, bank 1 is selected. If BA0 is High and

BA1 is Low, bank 2 is selected. If BAO is High and BA1 is High, bank 3 is selected.

CKE (INPUT PIN): This pin determines whether or not the next CLK is valid. If CKE is High, the next CLK rising

edge is valid. If CKE is Low, the next CLK rising edge is invalid. This pin is used for power-down mode,

clock suspend mode and self refresh mode¹.

DQM 1-6 (INPUT PINS): DQM 1-6 control input/output buffers

Read operation: If DQM 1-6 are High, the output buffer becomes High-Z. If the DQM 1-6 are Low, the output

buffer becomes Low-Z. ( The latency of DQM 1-6 during reading is 2 clock cycles.)

Write operation: If DQM 1-6 are High, the previous data is held ( the new data is not written). If the DQM 1-6

areLow, the data is written. ( The latency of DQM 1-6 during writing is 0 clock cycles.)

DQ0 TO DQ47 (DQ PINS): Data is input to and output from these pins ( DQ0 to DQ47).

V_CCAND V_CCQ (POWER SUPPLY PINS): 3.3V is applied. ( V_CCis for the internal circuit and V_CCQ is for the output

buffer.)

V_SSAND V_SSQ (POWER SUPPLY PINS): Ground is connected. (V_SSis for the internal circuit and V_SSQ is for the

output buffer.)

1. Self refresh mode should only be used at temperatures below 70°C.

08.21.2013 Rev 2

All data sheets are subject to change without notice

1...4 5 678 9 10...40

中文翻译

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与97SD3248BRPQK相关器件

型号	品牌	获取价格	描述	数据表
97SD3248RPME	MAXWELL	获取价格	Synchronous DRAM, 32MX48, 6ns, CMOS, STACK, QFP-132
97SD3248RPMI	MAXWELL	获取价格	Synchronous DRAM, 32MX48, 6ns, CMOS, STACK, QFP-132
97SD3248RPQE	MAXWELL	获取价格	1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks
97SD3248RPQH	MAXWELL	获取价格	1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks
97SD3248RPQI	MAXWELL	获取价格	1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks
97SD3248RPQK	MAXWELL	获取价格	1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks
97SMOK-18-33V	WK	获取价格	Crystal Clock Oscillators
97SMOK-5V	WK	获取价格	Crystal Clock Oscillators
97SMOKE	WK	获取价格	Crystal Clock Oscillators
97SMOKF	WK	获取价格	Crystal Clock Oscillators

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