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97SMOKQ

更新时间: 2024-11-09 01:03:27
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描述
Crystal Clock Oscillators

97SMOKQ 数据手册

  
Crystal Clock Oscillators  
(+1.8V, +2.5V, +2.8V, +3.0V or +3.3V FIXED MODELS)  
97SMO(K)  
STANDARD SMD CLOCK OSCILLATORS  
97SMO(K)  
STANDARD SPECIFICATIONS  
Item  
Generic part number  
Frequency range  
Frequency stability  
(0˚C to 70˚C)  
Specifications  
97SMO(K)1  
1.000 MHz to 166.000 MHz  
97SMO(KL) : ±100 ppm  
97SMO(KM) : ±50 ppm  
97SMO(KN) : ±30 ppm  
97SMO(KP) : ±25 ppm  
97SMO(KQ) : ±20 ppm  
over all conditions  
Actual Size  
Operating Conditions  
Operating temperature  
0˚C to 70˚C (standard)  
-40˚C to 85˚C (W)  
1.8V2 ±5%, 2.5V3 ±5%, 2.8V ±5%, 3.0V ±10% or 3.3V ±10%  
VIH : 70%VDD min.  
Input voltage (VDD)  
Stand-by control voltage (Pin#1)  
97SMO(K)  
7.0 0.2  
VIL : 20%VDD max.4  
#4  
#3  
Absolute Max. Ratings  
Supply voltage  
-0.5V to 7.0V DC  
Storage temperature  
Input current  
(Pin#1 = Open or VIH)  
-
55˚C to 125˚C  
#1  
#2  
20 mA max. (VDD = 1.8V)  
26 mA max. (VDD = 2.5V)  
55 mA max. (VDD = 2.8V, 3.0V & 3.3V)  
10μA max. (Pin#1=VIL)  
1.4  
3.68  
5.08  
1.4  
#1  
#4  
#2  
#3  
Stand  
Output (  
-
by current2  
40˚C to 85˚C)  
-
Symmetry  
Rise and fall times  
"0" level  
40% to 60% at 50%VDD level  
10 ns max. (10%VDD to 90%VDD level)  
VOL : 10%VDD max.  
PIN  
CONNECTION  
"L" OPEN or "H"  
1
2
3
4
GND  
"1" level  
VOH : 90%VDD min.  
Z
OUTPUT  
VDD  
Load  
15 pF max. (CMOS)  
Z : high impedance  
Disable delay time  
Enable delay time  
Startup time  
Aging  
150 ns max.  
10 ms max.  
10 ms max.  
OUTPUT WAVEFORM  
TF  
±5 ppm max. at 25˚C ±3˚C for first year  
250˚C ±10˚C for 10 seconds  
170˚C ±10˚C for 1 to 2 minutes (preheating)  
TR  
VDD  
VOH ("1"Level)  
90% or 80% VDD  
Reflow condition  
50% VDD  
10% or 20% VDD  
OV DC  
VOL ("0"Level)  
(1) Final exact part number to be determined with frequency, frequency stability, operating temperature and input voltage.  
e.g. 97SMO(K3.3VP) 16.000 MHz.  
(2) Frequency range is 1.0 MHz to 50.0 MHz.  
GND  
t
T
Symmetry=t/T×100(%)  
(3) Frequency range is 1.0 MHz to125.0 MHz.  
(4) Internal crystal oscillation to be halted (Pin#1 = VIL).  
TEST CIRCUIT  
PACKAGE DATA  
Test Point  
VDD  
Package  
A
97SMO(K)  
Metal  
Item  
#4  
VDD  
#3  
OUTPUT  
Lid  
DC Power  
Supply  
TRI-STATE  
V
GND  
#2  
CL  
Base  
Ceramic  
#1  
Sealing  
Terminal  
Seam  
Tungsten (metalized)  
Gold / Nickel  
(surface) / (under)  
Compliant (Pb-free)  
CL : including fixture and probe capacitance.  
TAPE SPECIFICATIONS  
4.0 0.1  
2.0 0.1  
L
Terminal plating  
RoHS  
SOLDERING PATTERN  
1.8  
+
0.1  
φ1.5  
1.8  
3.28  
-0  
J
B
F
M
0.01μF  
0.1μF  
A
B
C
D
F
J
L
M
Reel Dia.  
Qty/Reel  
7.65 5.75 16.0 7.5 8.0 2.0 0.3 2.2  
178 1000pcs  
5.08  
84  

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