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935311684574

更新时间： 2024-09-22 19:59:43
品牌 Logo 应用领域
恩智浦 - NXP 时钟微控制器外围集成电路
页数 文件大小 规格书
29页 498K
描述
Microcontroller

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935311684574 技术参数

生命周期：Active包装说明：SOP,
Reach Compliance Code：unknown风险等级：5.71
具有ADC：YES地址总线宽度：
位大小：8最大时钟频率：20 MHz
DMA 通道：NO外部数据总线宽度：
长度：5 mmI/O 线路数量：14
端子数量：16PWM 通道：YES
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE速度：20 MHz
最大供电电压：5.5 V最小供电电压：2.7 V
标称供电电压：5 V表面贴装：YES
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL宽度：4.4 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLERBase Number Matches：1

935311684574 数据手册

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Document Number MC9S08PA4  
Rev. 8, 08/2018  
NXP Semiconductors  
Data Sheet: Technical Data  
MC9S08PA4  
MC9S08PA4 Data Sheet  
Supports: MC9S08PA4(A)  
Key features  
• Development support  
– Single-wire background debug interface  
– Breakpoint capability to allow three breakpoints  
setting during in-circuit debugging  
– On-chip in-circuit emulator (ICE) debug module  
containing two comparators and nine trigger modes  
• 8-Bit S08 central processor unit (CPU)  
– Up to 20 MHz bus at 2.7 V to 5.5 V across operating  
temperature range  
– Supporting up to 40 interrupt/reset sources  
– Supporting up to four-level nested interrupt  
– On-chip memory  
• Peripherals  
– Up to 4 KB flash read/program/erase over full  
operating voltage and temperature  
– Up to 128 byte EEPROM; 2-byte erase sector;  
program and erase while executing flash  
– Up to 512 byte random-access memory (RAM)  
– Flash and RAM access protection  
– ACMP - one analog comparator with both positive  
and negative inputs; separately selectable interrupt  
on rising and falling comparator output; filtering  
– ADC - 8-channel, 12-bit resolution; 2.5 µs  
conversion time; data buffers with optional  
watermark; automatic compare function; internal  
bandgap reference channel; operation in stop mode;  
optional hardware trigger  
– FTM - Three 2-channel flex timer modulators  
modules; 16-bit counter; each channel can be  
configured for input capture, output compare, edge-  
or center-aligned PWM mode  
• Power-saving modes  
– One low-power stop mode; reduced power wait  
mode  
– Peripheral clock enable register can disable clocks to  
unused modules, reducing currents; allows clocks to  
remain enabled to specific peripherals in stop3 mode  
– RTC - 16-bit real timer counter (RTC)  
– SCI - one serial communication interface (SCI/  
UART) modules optional 13-bit break; full duplex  
non-return to zero (NRZ); LIN extension support  
• Clocks  
– Oscillator (XOSC) - loop-controlled Pierce  
oscillator; crystal or ceramic resonator range of  
31.25 kHz to 39.0625 kHz or 4 MHz to 20 MHz  
– Internal clock source (ICS) - containing a frequency-  
locked-loop (FLL) controlled by internal or external  
reference; precision trimming of internal reference  
allowing 1% deviation across temperature range of 0  
°C to 70 °C and 2% deviation across whole  
operating temperature range; up to 20 MHz  
• Input/Output  
– Up to 18 GPIOs including one output-only pin  
– One 8-bit keyboard interrupt module (KBI)  
– Two, ultra-high current sink pins supporting 20 mA  
source/sink current  
• Package options  
– 20-pin SOIC  
– 20-pin TSSOP  
– 16-pin TSSOP  
– 8-pin DFN  
• System protection  
– Watchdog with independent clock source  
– Low-voltage detection with reset or interrupt;  
selectable trip points  
– Illegal opcode detection with reset  
– Illegal address detection with reset  
– 8-pin SOIC  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  
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