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935048030602

更新时间： 2024-09-21 15:27:15
品牌 Logo 应用领域
恩智浦 - NXP 信息通信管理光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
6页 73K
描述
ABT SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDIP24, PLASTIC, DIP-24

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935048030602 技术参数

生命周期：Obsolete零件包装代码：DIP
包装说明：DIP,针数：24
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.73系列：ABT
JESD-30 代码：R-PDIP-T24长度：31.7 mm
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER位数：1
功能数量：8端口数量：2
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE传播延迟（tpd）：8.2 ns
认证状态：Not Qualified座面最大高度：4.7 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：BICMOS温度等级：INDUSTRIAL
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL宽度：7.62 mm
Base Number Matches：1

935048030602 数据手册

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Philips Semiconductors  
Product specification  
Octal registered transceiver, inverting (3-State)  
74ABT2953  
FEATURES  
• 8-bit registered transceiver  
DESCRIPTION  
The 74ABT2953 high-performance BiCMOS device combines low  
static and dynamic power dissipation with high speed and high  
output drive.  
• Independent registers for A and B buses  
• Output capability: +64mA/–32mA  
The 74ABT2953 device is an 8-bit registered inverting transceiver.  
Two 8-bit back-to-back registers store data flowing in both directions  
between two bidirectional buses. Data applied to the inputs is  
entered and stored on the rising edge of the Clock (CPXX) provided  
that the Clock Enable (CEXX) is Low. The data is then present at  
the 3-State output buffers, but is only accessible when the Output  
Enable (OEXX) is Low. Data flow from A inputs to B outputs is the  
same as for B inputs to A outputs.  
• Latch-up protection exceeds 500mA per Jedec Std 17  
• ESD protection exceeds 2000V per MIL STD 883 Method 3015  
and 200V per Machine Model  
• Live insertion/extraction permitted  
• Power-up 3-State  
• Power-up reset  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
PLH  
PHL  
C = 50pF; V = 5V  
5.0  
4
ns  
pF  
pF  
nA  
L
CC  
CPBA to An or CPAB to Bn  
Input capacitance  
C
V = 0V or V  
I CC  
IN  
Outputs disabled;  
= 0V or V  
C
I/O capacitance  
7
I/O  
V
O
CC  
I
Total supply current  
Outputs disabled; V =5.5V  
500  
CCZ  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74ABT2953 N  
DWG NUMBER  
SOT222-1  
24-Pin Plastic DIP  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT9253 N  
74ABT2953 D  
74ABT2953 DB  
74ABT2953 PW  
24-Pin plastic SO  
74ABT2953 D  
SOT137-1  
24-Pin Plastic SSOP Type II  
24-Pin Plastic TSSOP Type I  
74ABT2953 DB  
74ABT2953PW DH  
SOT340-1  
SOT355-1  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN NUMBER  
SYMBOL  
NAME AND FUNCTION  
CPAB /  
CPBA  
Clock input A to B / Clock input  
B to A  
10, 14  
24  
B7  
B6  
1
2
3
4
5
6
7
8
9
V
CC  
23 A7  
22 A6  
21 A5  
20 A4  
19 A3  
18 A2  
17 A1  
16 A0  
CEAB /  
CEBA  
Clock enable input A to B / Clock  
enable input B to A  
11, 13  
B5  
B4  
16, 17, 18, 19,  
20, 21, 22, 23  
A0 – A7  
B0 – B7  
Data inputs/outputs (A side)  
Data outputs/outputs (B side)  
Output enable inputs  
B3  
B2  
1, 2, 3, 4, 5, 6,  
7, 8  
B1  
B0  
OEAB /  
OEBA  
9, 15  
OEAB  
CPAB 10  
CEAB 11  
GND 12  
15  
14  
13  
OEBA  
CPBA  
CEBA  
12  
24  
GND  
Ground (0V)  
V
CC  
Positive supply voltage  
TOP VIEW  
SA00305  
1
1995 Sep 06  
853-1555 15702  
123456

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