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8P791208 PDF预览

8P791208

更新时间: 2024-10-02 01:08:31
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
32页 817K
描述
Low Additive Jitter 2:8 Buffer with CMOS/ Differential Outputs

8P791208 数据手册

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Low Additive Jitter 2:8 Buffer with  
8P791208  
CMOS/ Differential Outputs  
Datasheet  
General Description  
The 8P791208 is a low additive jitter 2:8 buffer with CMOS/  
differential outputs The device takes one or two reference clocks,  
selects between them using a pin selection, and generates up to  
eight outputs that are the same as the reference frequency.  
Features  
• Accepts input frequencies ranging from 1PPS (1Hz) to 700MHz  
• Two differential inputs support LVPECL, LVDS, LVHSTL, HCSL or  
LVCMOS reference clocks  
• Generates 8 differential or 16 LVCMOS outputs  
The 8P791208 supports two output banks, each with its own power  
supply. All outputs in one bank would generate the same output  
frequency, but each output can be individually controlled for output  
type or output enable.  
• Outputs arranged in two banks of four outputs each  
• Select pins control which input drives which of two output banks  
• Controlled by 3-level input pins that are 3.3V tolerant for all core  
voltages  
The device can operate over the -40°C to 85°C temperature range.  
• Output type may be selected from LVPEC, LVDS or 2xLVCMOS  
• Each bank supports a separate power supply of 3.3V, 2.5V or  
1.8V  
• LVCMOS outputs are limited to 125MHz maximum and support  
swings of 3.3V, 2.5V, 1.8V and 1.5V  
• Individual output enables and output type selection supported  
• Output noise floor of –158dBc/Hz @ 156.25MHz  
• Core voltage supply of 3.3V, 2.5V or 1.8V  
• –40°C to 85°C ambient operating temperature  
• Lead-free (RoHS 6) QFN-32 (5mm x 5mm) packaging  
©2016 Integrated Device Technology  
1
November 28, 2016  

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