Datasheet > 87C51FC-24

87C51FC-24

更新时间： 2023-04-15 00:00:00

品牌	Logo	应用领域
英特尔 - INTEL		微控制器
页数	文件大小	规格书
20页	241K
描述
Microcontroller,

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87C51FC-24 数据手册

8XC51FX

Normally EA/V is held at logic high until just be-

fore ALE/PROG is to be pulsed. Then EA/V

PROGRAMMING THE EPROM/OTP

raised to V , ALE/PROG is pulsed low, and then

To be programmed, the part must be running with a

4 to 6 MHz oscillator. (The reason the oscillator

needs to be running is that the internal bus is being

used to transfer address and program data to appro-

priate internal EPROM locations.) The address of an

EPROM location to be programmed is applied to

Port 1 and pins P2.0 - P2.4 of Port 2, while the code

byte to be programmed into that location is applied

to Port 0. The other Port 2 and 3 pins, RST PSEN,

EA/V is returned to a valid high voltage. The volt-

age on the EA/V pin must be at the valid EA/V

high level before a verify is attempted. Waveforms

and detailed timing specifications are shown in later

sections of this data sheet.

NOTE:

EA/V pin must not be allowed to go above the

maximum specified V level for any amount of

and EA/V should be held at the ‘‘Program’’ levels

indicated in Table 4. ALE/PROG is pulsed low to

program the code byte into the addressed EPROM

location. The setup is shown in Figure 10.

time. Even a narrow glitch above that voltage lev-

el can cause permanent damage to the device.

The V source should be well regulated and free

of glitches.

Table 4. EPROM Programming Modes

ALE/

EA/

Mode

RST

PSEN

P2.6

P2.7

P3.3

P3.6

P3.7

PROG

Program Code Data

Verify Code Data

12.75V

Program Encryption

Array Address 0–3FH

12.75V

Program Lock

Bits

Bit 1

Bit 2

Bit 3

12.75V

Read Signature Byte

272322–20

*See Table 4 for proper input on these pins

Figure 10. Programming the EPROM

1...13 14 151617 18 19 20

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