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85C72I/J PDF预览

85C72I/J

更新时间: 2024-02-18 07:57:24
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
8页 107K
描述
128 X 8 I2C/2-WIRE SERIAL EEPROM, CDIP8, 0.300 INCH, CERDIP-8

85C72I/J 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:0.207 INCH, PLASTIC, SOIC-8针数:8
Reach Compliance Code:unknown风险等级:5.87
其他特性:100K ERASE/WRITE CYCLES MIN; DATA RETENTION > 40 YEARS最大时钟频率 (fCLK):0.1 MHz
数据保留时间-最小值:200耐久性:1000000 Write/Erase Cycles
I2C控制字节:1010DDDRJESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:5.28 mm
内存密度:1024 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:8字数:128 words
字数代码:128工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128X8输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:2.03 mm
串行总线类型:I2C最大待机电流:0.0001 A
子类别:EEPROMs最大压摆率:0.00425 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.207 mm
最长写入周期时间 (tWC):1 msBase Number Matches:1

85C72I/J 数据手册

 浏览型号85C72I/J的Datasheet PDF文件第2页浏览型号85C72I/J的Datasheet PDF文件第3页浏览型号85C72I/J的Datasheet PDF文件第4页浏览型号85C72I/J的Datasheet PDF文件第5页浏览型号85C72I/J的Datasheet PDF文件第7页浏览型号85C72I/J的Datasheet PDF文件第8页 
85C72/82/92  
7.0  
ACKNOWLEDGE POLLING  
8.0  
READ MODE  
Since the device will not acknowledge during a write  
cycle, this can be used to determine when the cycle is  
complete (this feature can be used to maximize bus  
throughput). Once the stop condition for a write com-  
mand has been issued from the master, the device ini-  
tiates the internally timed write cycle. ACK polling can  
be initiated immediately. This involves the master  
sending a start condition followed by the control byte  
for a write command (R/W = 0). If the device is still  
busy with the write cycle, then no ACK will be returned.  
If the cycle is complete, then the device will return the  
ACK and the master can then proceed with the next  
read or write command. See Figure 7-1 for flow dia-  
gram.  
This mode illustrates master device reading data from  
the 85C72/82/92.  
As can be seen from Figure 8-1, the master first sets up  
the slave and word addresses by doing a write.  
Note: Although this is a read mode, the address  
pointer must be written to.  
During this period the 85C72/82/92 generates the nec-  
essary acknowledge bits as defined in the appropriate  
section.  
The master now generates another START condition  
and transmits the slave address again, except this time  
the read/write bit is set into the read mode. After the  
slave generates the acknowledge bit, it then outputs  
the data from the addressed location on to the SDA pin,  
increments the address pointer and, if it receives an  
acknowledge from the master, will transmit the next  
consecutive byte. This autoincrement sequence is  
only aborted when the master sends a STOP condition  
instead of an acknowledge.  
FIGURE 7-1: ACKNOWLEDGE POLLING  
FLOW  
Send  
Write Command  
Send Stop  
Condition to  
Initiate Write Cycle  
Note 1: If the master knows where the address  
pointer is, it can begin the read sequence  
at point ‘R’ indicated on Figure 8-1 and  
save time transmitting the slave and word  
addresses.  
Send Start  
Note 2: In all modes, the address pointer will auto-  
matically increment from the end of the  
memory block (256 byte) back to the first  
location in that block.  
Send Control Byte  
with R/W = 0  
Did Device  
No  
Acknowledge  
(ACK = 0)?  
Yes  
Next  
Operation  
FIGURE 8-1: READ MODE  
ACKNOWLEDGES FROM MASTER RECEIVER  
LAST  
ACKNOWLEDGES FROM SLAVE RECEIVER  
SLAVE  
ADDRESS  
SLAVE  
START  
0 A WORD ADDRESS A START  
1 A  
A
STOP  
DATA BYTE 1  
DATA BYTE  
ADDRESS  
R/W  
R
R/W  
AUTO INCREMENT  
WORD ADDRESS  
DS11182C-page 6  
1995 Microchip Technology Inc.  

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