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856653-EVB PDF预览

856653-EVB

更新时间: 2022-02-26 12:23:19
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TRIQUINT /
页数 文件大小 规格书
7页 616K
描述
1250 MHz Filter

856653-EVB 数据手册

 浏览型号856653-EVB的Datasheet PDF文件第1页浏览型号856653-EVB的Datasheet PDF文件第3页浏览型号856653-EVB的Datasheet PDF文件第4页浏览型号856653-EVB的Datasheet PDF文件第5页浏览型号856653-EVB的Datasheet PDF文件第6页浏览型号856653-EVB的Datasheet PDF文件第7页 
856653  
1250 MHz Filter  
Absolute Maximum Ratings  
Parameter  
Storage Temperature (1)  
Operable Temperature (1)  
Rating  
-40 to +85°C  
1. Operation of this device outside the parameter ranges given may  
cause permanent damage.  
-40 to +85°C  
Electrical Specifications (1) (3)  
Test conditions unless otherwise noted: (2) Temperature Range 0 to +70°C  
Parameter  
Center Frequency  
Conditions  
Min Typical (4) Max  
Units  
MHz  
dB  
-
1250  
Maximum Insertion Loss  
1200ꢀꢀ–ꢀꢀ1300ꢀMHz  
-
6.8  
8
1200 1300MHz  
1200 1300MHz (in any 8ꢀMHz channel)  
-
-
1.1  
1.1  
3.0  
2.0  
Amplitude Variation  
Group Delay Ripple  
dB p-p  
ns p-p  
1200 1300MHz  
1200 1300MHz (in any 8ꢀMHz channel)  
-
-
18  
8
60  
18  
-
-
-
-
800 1052MHz  
1052 1152ꢀMHz  
1350 1450ꢀMHz  
1450 2000MHz  
45  
40  
20  
40  
55  
50  
25  
50  
Attenuation(5)  
dB  
dB  
Input / Output Return Lossꢁ  
1200ꢀ–ꢀ1300ꢀMHz  
-
9
-
Test conditions unless otherwise noted: (2) Temperature Range -40 to +ꢀ85ꢁ°C  
Parameter  
Maximum Insertion Loss  
Conditions  
1200ꢀꢀ–ꢀ1300ꢀMHz  
Min Typical (4) Max  
Units  
dB  
-
6.8  
8.5  
1200 1300MHz  
1200 1300MHz (in any 8ꢀMHz channel)  
-
-
1.1  
1.1  
3.0  
2.0  
Amplitude Variation  
Group Delay Ripple  
dB p-p  
ns p-p  
1200 1300MHz  
1200 1300MHz (in any 8ꢀMHz channel)  
-
-
18  
8
60  
18  
800 1052MHz  
1052 1152ꢀMHz  
1350 1450ꢀMHz  
1450 2000MHz  
45  
40  
20  
40  
55  
50  
25  
50  
-
-
-
-
Attenuation(5)  
dB  
Input / Output Return Lossꢁ  
Source/Load Impedanceꢀ(6)  
1200ꢀꢀ–ꢀ1300ꢀMHz  
Balanced  
-
-
9
200  
-
-
dB  
Notes:  
1. All specifications are based on the TriQuint schematic for the main reference design shown on page 3  
2. In production, devices will be tested at room temperature to a guardbanded specification to ensure electrical compliance  
over temperature  
3. Electrical margin has been built into the design to account for the variations due to temperature drift and manufacturing  
tolerances  
4. Typical values are based on average measurements at room temperature  
5. Relative to zero dB  
6. This is the optimum impedance in order to achieve the performance shown  
Data Sheet: Rev. E 14-06-16  
Disclaimer: Subject to change without notice  
- 2 of 7 -  
© 2014 TriQuint  
www.triquint.com  

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