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8550501RA PDF预览

8550501RA

更新时间: 2024-10-01 08:10:19
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
13页 417K
描述
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

8550501RA 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP20,.3针数:20
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.48控制类型:ENABLE LOW
计数方向:UNIDIRECTIONAL系列:HCT
JESD-30 代码:R-GDIP-T20长度:24.2 mm
负载电容(CL):150 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):0.16 mA
传播延迟(tpd):63 ns认证状态:Qualified
筛选级别:MIL-STD-883座面最大高度:5.08 mm
子类别:Bus Driver/Transceiver最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.92 mm
Base Number Matches:1

8550501RA 数据手册

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SCLS174E − MARCH 1984 − REVISED AUGUST 2003  
SN54HCT240 . . . J OR W PACKAGE  
SN74HCT240 . . . DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
Operating Voltage Range of 4.5 V to 5.5 V  
High-Current Outputs Drive Up To 15  
LSTTL Loads  
D
D
D
D
D
D
Low Power Consumption, 80-µA Max I  
Typical t = 12 ns  
pd  
6-mA Output Drive at 5 V  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
1
2
3
4
5
6
7
8
9
20  
V
CC  
CC  
19 2OE  
18 1Y1  
17 2A4  
16 1Y2  
15 2A3  
14 1Y3  
13 2A2  
12 1Y4  
11 2A1  
Low Input Current of 1 µA Max  
Inputs Are TTL-Voltage Compatible  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
description/ordering information  
GND 10  
These octal buffers and line drivers are designed  
specifically to improve both the performance and  
density of 3-state memory address drivers, clock  
drivers, and bus-oriented receivers and  
transmitters. The ’HCT240 devices are organized  
as two 4-bit buffers/drivers with separate  
output-enable (OE) inputs. When OE is low, the  
device passes inverted data from the A inputs to  
the Y outputs. When OE is high, the outputs are  
in the high-impedance state.  
SN54HCT240 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube of 20  
Tube of 25  
Reel of 2000  
Reel of 2000  
Tube of 70  
Reel of 2000  
Reel of 250  
Tube of 20  
Tube of 85  
Tube of 55  
SN74HCT240N  
SN74HCT240N  
SN74HCT240DW  
SN74HCT240DWR  
SN74HCT240NSR  
SN74HCT240PW  
SN74HCT240PWR  
SN74HCT240PWT  
SNJ54HCT240J  
SOIC − DW  
SOP − NS  
HCT240  
HCT240  
−40°C to 85°C  
TSSOP − PW  
HT240  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HCT240J  
SNJ54HCT240W  
SNJ54HCT240W  
SNJ54HCT240FK  
−55°C to 125°C  
SNJ54HCT240FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢋ ꢛ ꢦ ꢞ ꢝꢩ ꢤꢣ ꢡꢢ ꢣꢝ ꢟꢦ ꢨꢚ ꢠꢛ ꢡ ꢡꢝ ꢰꢔ ꢍꢘ ꢙꢒ ꢐ ꢘꢗꢱꢂ ꢗꢂꢉ ꢠꢨꢨ ꢦꢠ ꢞ ꢠ ꢟꢥ ꢡꢥꢞ ꢢ ꢠ ꢞ ꢥ ꢡꢥ ꢢꢡꢥ ꢩ  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
ꢤ ꢛꢨ ꢥꢢꢢ ꢝ ꢡꢫꢥ ꢞ ꢭꢚ ꢢꢥ ꢛ ꢝꢡꢥ ꢩꢪ ꢋ ꢛ ꢠꢨ ꢨ ꢝ ꢡꢫꢥ ꢞ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢢ ꢉ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢚꢝ ꢛ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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