Datasheet > 8536AGI-33T

8536AGI-33T

更新时间： 2024-01-25 14:42:08

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
15页	603K
描述
Clock Generator

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技术参数
数据手册

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8536AGI-33T 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
Reach Compliance Code：	unknown	风险等级：	5.92
Base Number Matches：	1

8536AGI-33T 数据手册

PRELIMINARY

ICS8536I-33

Integrated

Circuit

Systems, Inc.

LOW SKEW, 1-TO-6, CRYSTAL OSCILLATOR/

LVCMOS-TO-3.3V LVPECL/LVCMOS FANOUT BUFFER

TABLE 1. PIN DESCRIPTIONS

Number

Name

Type

Pullup

Description

Synchronizing clock enable. When HIGH, clock outputs follows clock

input. When LOW, Q outputs are forced low, nQ0 output is forced high.

LVCMOS / LVTTL interface levels.

Crystal oscillator interface. XTAL_IN is the input.

XTAL_OUT is the output.

CLK_EN

Input

XTAL_IN,

XTAL_OUT

V_CC

Power

Input

Positive supply pins.

CLK

Pulldown Clock input. LVCMOS / LVTTL interface levels.

Clock select input. When HIGH, selects XTAL inputs.

Pullup

CLK_SEL

V_EE

Input

When LOW, selects CLK input. LVCMOS / LVTTL interface levels.

7, 15,

Power

Negative supply pin.

8, 9

Q0, nQ0

V_{CCO_LVPECL}

Q1, nQ1

Output

Power

Output

Power

Differential clock outputs. LVPECL interface levels.

Output power supply mode for LVPECL clock outputs.

Differential clock outputs. LVPECL interface levels.

Single ended clock outputs. LVCMOS / LVTTL interface levels.

Output power supply mode for LVCMOS / LVTTL clock outputs.

11, 12

13, 14

16, 18, 19

Q2, nQ2

Q3, Q4, Q5

V_{CCO_LVCMOS}

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

TABLE 2. PIN CHARACTERISTICS

Symbol

Parameter

Test Conditions

Minimum Typical Maximum Units

C_IN

Input Capacitance

Power Dissipation Capacitance

(per output)

C_PD

TBD

R_PULLUP

Input Pullup Resistor

kΩ

R_PULLDOWN

Input Pulldown Resistor

8536AGI-33

www.icst.com/products/hiperclocks.html

REV.A MARCH 16, 2006

123 4 5 6 7...15

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