Datasheet > 8536AGI-33T

8536AGI-33T

更新时间： 2024-01-16 21:34:56

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
15页	603K
描述
Clock Generator

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技术参数
数据手册

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8536AGI-33T 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
Reach Compliance Code：	unknown	风险等级：	5.92
Base Number Matches：	1

8536AGI-33T 数据手册

PRELIMINARY

ICS8536I-33

Integrated

Circuit

Systems, Inc.

LOW SKEW, 1-TO-6, CRYSTAL OSCILLATOR/

LVCMOS-TO-3.3V LVPECL/LVCMOS FANOUT BUFFER

TABLE 6A. LVPECL AC CHARACTERISTICS, V_CC=V_{CCO_LVPECL}= 3.3V 5ꢀ, TA = -40°C TO 85°C

Symbol

f_MAX

Parameter

Test Conditions

Minimum Typical Maximum Units

Output Frequency

Propagation Delay; NOTE 1

266

MHz

t_PD

1.65

0.16

155.52MHz,

(Integration Range:

12kHz - 20MHz)

Buffer Additive Phase Jitter, RMS;

refer to Additive Phase Jitter Section

tjit

tsk(bk-bk) Bank-to-Bank Skew; NOTE 2

ꢀ

tsk(o)

tsk(pp)

t_R/ t_F

Output Skew; NOTE 3, 5

Part-to-Part Skew; NOTE 4, 5

Output Rise/Fall Time

Output Duty Cycle

800

450

20ꢀ to 80ꢀ

odc

All parameters measured at ƒ≤ 266MHz unless noted otherwise.

NOTE 1: Measured from the V_CCO/2 of the input to the differential output crossing point.

NOTE 2: Measured from the crosspoint of the differential output to V_CCO/2 of LVCMOS output using typical voltage.

NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.

Measured at the output differential cross points.

NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load

conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.

NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.

TABLE 6B. LVCMOS AC CHARACTERISTICS, V_CC=V_{CCO_LVCMOS}= 2.5V 5ꢀ, TA = -40°C TO 85°C

Symbol

f_MAX

Parameter

Test Conditions

Minimum Typical Maximum Units

Output Frequency

Propagation Delay; NOTE 1

266

MHz

t_PD

2.55

0.16

155.52MHz,

(Integration Range:

12kHz - 20MHz)

Buffer Additive Phase Jitter, RMS;

refer to Additive Phase Jitter Section

tjit

tsk(bk-bk) Bank-to-Bank Skew; NOTE 2

ꢀ

tsk(o)

tsk(pp)

t_R/ t_F

Output Skew; NOTE 3, 5

Part-to-Part Skew; NOTE 4, 5

Output Rise/Fall Time

Output Duty Cycle

800

550

20ꢀ to 80ꢀ

odc

All parameters measured at ƒ≤ 266MHz unless noted otherwise.

NOTE 1: Measured from the V_CCO/2 of the input to the differential output crossing point.

NOTE 2: Measured from the crosspoint of the differential output to V_CCO/2 of LVCMOS output using typical voltage.

NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.

Measured at the output differential cross points.

NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load

conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.

NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.

8536AGI-33

www.icst.com/products/hiperclocks.html

REV.A MARCH 16, 2006

1...3 4 567 8 9...15

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8536CGI-33	IDT	LOW SKEW, 1-TO-6, CRYSTAL OSCILLATOR/LVCMOSTO-3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER	获取价格
8536CGI-33LF	IDT	LOW SKEW, 1-TO-6, CRYSTAL OSCILLATOR/LVCMOSTO-3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER	获取价格
8536CGI-33LFT	IDT	LOW SKEW, 1-TO-6, CRYSTAL OSCILLATOR/LVCMOSTO-3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER	获取价格
8536CGI-33T	IDT	LOW SKEW, 1-TO-6, CRYSTAL OSCILLATOR/LVCMOSTO-3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER	获取价格
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