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85102

更新时间： 2024-01-06 17:51:22

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
17页	244K
描述
Low Skew, 1-to-2, Differential/LVCMOS HCSL Fanout Buffer

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85102 技术参数

生命周期：	Transferred	Reach Compliance Code：	unknown
风险等级：	5.27	其他特性：	STANDARD: MIL-C-26482, MAX CONTACTS (SERIES)=61
后壳类型：	SOLID	主体/外壳类型：	RECEPTACLE
连接器类型：	MIL SERIES CONNECTOR	触点性别：	FEMALE; MALE
耦合类型：	BAYONET	DIN 符合性：	NO
空壳：	NO	环境特性：	ENVIRONMENT/VIBRATION RESISTANT
滤波功能：	NO	IEC 符合性：	NO
MIL 符合性：	YES	插接信息：	MULTIPLE MATING PARTS AVAILABLE
混合触点：	NO	安装类型：	PANEL
选件：	GENERAL PURPOSE	外壳面层：	CADMIUM PLATED
外壳材料：	ALUMINUM ALLOY	外壳尺寸：	8; 10; 12; 14; 16; 18; 20; 22; 24
端接类型：	SOLDER	Base Number Matches：	1

85102 DATA SHEET

ADDITIVE PHASE JITTER

fundamental.When the required offset is speciﬁed, the phase noise

is called a dBc value, which simply means dBm at a speciﬁed offset

from the fundamental.By investigating jitter in the frequency domain,

we get a better understanding of its effects on the desired application

over the entire time record of the signal.It is mathematically possible

to calculate an expected bit error rate given a phase noise plot.

The spectral purity in a band at a speciﬁc offset from the fundamental

compared to the power of the fundamental is called the dBc Phase

Noise. This value is normally expressed using a Phase noise plot

and is most often the speciﬁed plot in many applications. Phase

noise is deﬁned as the ratio of the noise power present in a 1Hz

band at a speciﬁed offset from the fundamental frequency to the

power value of the fundamental.This ratio is expressed in decibels

(dBm) or a ratio of the power in the 1Hz band to the power in the

Additive Phase Jitter, Integration Range:

12kHz - 20MHz at 250MHz = 0.14ps (typical)

OFFSET FROM CARRIER FREQUENCY (HZ)

As with most timing speciﬁcations, phase noise measurements has

issues relating to the limitations of the equipment. Often the noise

ﬂoor of the equipment is higher than the noise ﬂoor of the device.

This is illustrated above. The device meets the noise ﬂoor of what

is shown, but can actually be lower.The phase noise is dependent

on the input source and measurement equipment.

Low Skew, 1-to-2, Differential/LVCMOS-to-0.7V HCSL

Fanout Buffer

REVISION B 12/19/14

1...3 4 567 8 9...17

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