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8421002AGILFT PDF预览

8421002AGILFT

更新时间: 2024-01-04 15:36:59
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
15页 1081K
描述
Clock Generator, 226.66MHz, PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20

8421002AGILFT 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20
针数:20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.79其他特性:ALSO OPERATES AT 3.3V SUPPLY
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:6.5 mm湿度敏感等级:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:226.66 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:2.5/3.3 V主时钟/晶体标称频率:28.33 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Clock Generators最大压摆率:110 mA
最大供电电压:2.625 V最小供电电压:2.375 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

8421002AGILFT 数据手册

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ICS8421002I  
FEMTOCLOCKS™ CRYSTAL-TO-HSTL FREQUENCY SYNTHESIZER  
POWER CONSIDERATIONS  
This section provides information on power dissipation and junction temperature for the ICS8421002I.  
Equations and example calculations are also provided.  
1. Power Dissipation.  
The total power dissipation for the ICS8421002I is the sum of the core power plus the power dissipated in the load(s).  
The following is the power dissipation for V = 3.3V + 5ꢀ = 3.465V, which gives worst case results.  
DD  
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.  
Power (core) = V  
* I  
= 3.465V * 122mA = 422.7mW  
DD_MAX  
MAX  
DD_MAX  
Power (outputs) = 32.8mW/Loaded Output pair  
MAX  
If all outputs are loaded, the total power is 2 * 32.8mW = 65.6mW  
Total Power  
(3.465V, with all outputs switching) = 422.7mW + 65.6mW = 488.3mW  
_MAX  
2. Junction Temperature.  
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the  
TM  
device. The maximum recommended junction temperature for HiPerClockS devices is 125°C.  
The equation for Tj is as follows: Tj = θJA * Pd_total + TA  
Tj = Junction Temperature  
θJA = Junction-to-Ambient Thermal Resistance  
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)  
TA = Ambient Temperature  
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a  
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.  
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:  
85°C + 0.488W * 66.6°C/W = 117.5°C. This is below the limit of 125°C.  
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,  
and the type of board (single layer or multi-layer).  
TABLE 6. THERMAL RESISTANCE θ FOR 20-PIN TSSOP, FORCED CONVECTION  
JA  
θ by Velocity (Linear Feet per Minute)  
JA  
0
200  
98.0°C/W  
66.6°C/W  
500  
88.0°C/W  
63.5°C/W  
Single-Layer PCB, JEDEC Standard Test Boards  
Multi-Layer PCB, JEDEC Standard Test Boards  
114.5°C/W  
73.2°C/W  
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.  
IDT/ ICSHSTL FREQUENCY SYNTHESIZER  
9
ICS8421002I REV B MARCH 02, 2009  

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