83C51GB

更新时间： 2022-11-29 01:24:46

品牌	Logo	应用领域
英特尔 - INTEL		微控制器
页数	文件大小	规格书
22页	313K
描述
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

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数据手册

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83C51GB 数据手册

8XC51GB

PROGRAMMING THE OTP

DEFINITION OF TERMS

The part must be running with a 4 MHz to 6 MHz

oscillator. The address of a location to be pro-

grammed is applied to address lines while the code

byte to be programmed in that location is applied to

data lines. Control and program signals must be held

ADDRESS LINES: P1.0–P1.7, P2.0–P2.4, respec-

tively for A0–A12.

DATA LINES: P0.0–P0.7 for D0–D7.

at the levels indicated in Table 2. Normally EA/V

CONTROL SIGNALS: RST, PSEN, P2.6, P2.7, P3.3,

P3.6, P3.7

is held at logic high until just before ALE/PROG is to

be pulsed. The EA/V is raised to V , ALE/PROG

is pulsed low and then EA/V is returned to a high

PROGRAM SIGNALS: ALE/PROG, EA/V

(also refer to timing diagrams).

NOTE:

maximum for any amount of

Exceeding the V

time could damage the device permanently. The

source must be well regulated and free of

glitches.

272337–20

*See Table 2 for proper input on these pins.

Figure 11. Programming the OTP

Table 2. OTP Programming Modes

ALE/

EA/

Mode

RST

PSEN

P2.6

P2.7

P3.3

P3.6

P3.7

PROG

Program Code Data

Verify Code Data

12.75V

Program Encryption

Array Address 0–3FH

12.75V

Program Lock

Bits

Bit 1

12.75V

Bit 2

Bit 3

Read Signature Byte

1...14 15 161718 19 20...22

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