Datasheet > 80C186EB13

80C186EB13

更新时间： 2022-11-26 03:03:03

品牌	Logo	应用领域
英特尔 - INTEL		/
页数	文件大小	规格书
59页	779K
描述
16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

80C186EB13 数据手册

80C186EB/80C188EB, 80L186EB/80L188EB

INSTRUCTION SET SUMMARY (Continued)

80C186EB 80C188EB

Function

Format

Clock

Comments

Cycles

PROCESSOR CONTROL

CLC

CMC

STC

CLD

STD

Clear carry

1 1 1 1 1 0 0 0

1 1 1 1 0 1 0 1

1 1 1 1 1 0 0 1

1 1 1 1 1 1 0 0

1 1 1 1 1 1 0 1

1 1 1 1 1 0 1 0

1 1 1 1 1 0 1 1

1 1 1 1 0 1 0 0

1 0 0 1 1 0 1 1

1 1 1 1 0 0 0 0

Complement carry

Set carry

Clear direction

Set direction

CLI

STI

Clear interrupt

Set interrupt

HLT

Halt

WAIT

LOCK

Wait

if TEST

Bus lock prefix

NOP

No Operation

1 0 0 1 0 0 0 0

(TTT LLL are opcode to processor extension)

Shaded areas indicate instructions not available in 8086/8088 microsystems.

NOTE:

*Clock cycles shown for byte transfers. For word operations, add 4 clock cycles for all memory transfers.

reg is assigned according to the following:

Segment

FOOTNOTES

The Effective Address (EA) of the memory operand

is computed according to the mod and r/m fields:

reg

if mod

11 then r/m is treated as a REG field

00 then DISP

high are absent

0*, disp-low and disp-

tended to 16-bits, disp-high is absent

if mod

01 then DISP

disp-low sign-ex-

REG is assigned according to the following table:

if mod

if r/m

16-Bit (w

8-Bit (w

000 AL

(BX)

000 AX

001 CX

010 DX

011 BX

100 SP

101 BP

110 SI

(BX)

(BP)

001 CL

010 DL

011 BL

100 AH

101 CH

110 DH

111 BH

(SI)

(DI)

(BP)

(BX)

DISP follows 2nd byte of instruction (before data if

required)

111 DI

The physical addresses of all operands addressed

by the BP register are computed using the SS seg-

ment register. The physical addresses of the desti-

nation operands of the string primitive operations

(those addressed by the DI register) are computed

using the ES segment, which may not be overridden.

110 then EA

*except if mod

disp-high: disp-low.

00 and r/m

EA calculation time is 4 clock cycles for all modes,

and is included in the execution times given whenev-

er appropriate.

Segment Override Prefix

reg

1...55 56 575859

下载PDF

与80C186EB13相关器件

型号	品牌	描述	获取价格	数据表
80C186EB20	INTEL	16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS	获取价格
80C186EB25	INTEL	16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS	获取价格
80C186EC	INTEL	16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS	获取价格
80C186EC13	INTEL	16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS	获取价格
80C186EC20	INTEL	16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS	获取价格
80C186EC25	INTEL	16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS	获取价格