Datasheet > 78P2351-IGT/F

78P2351-IGT/F

更新时间： 2024-01-18 06:48:58

品牌	Logo	应用领域
美信 - MAXIM		ATM 异步传输模式电信电信集成电路
页数	文件大小	规格书
42页	736K
描述
Transceiver, 1-Func, CMOS, PQFP100, LEAD FREE, LQFP-100

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技术参数
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78P2351-IGT/F 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
包装说明：	LEAD FREE, LQFP-100	Reach Compliance Code：	unknown
风险等级：	5.8	Is Samacsys：	N
应用程序：	SDH	JESD-30 代码：	S-PQFP-G100
长度：	14 mm	功能数量：	1
端子数量：	100	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP100,.63SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
电源：	3.3 V	认证状态：	Not Qualified
座面最大高度：	1.6 mm	子类别：	Digital Transmission Interfaces
最大压摆率：	0.212 mA	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
电信集成电路类型：	ATM/SONET/SDH TRANSCEIVER	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	14 mm
Base Number Matches：	1

78P2351-IGT/F 数据手册

78P2351

Single Channel

OC-3/ STM1-E/ E4 LIU

Transmit Driver

Transmit Backplane Equalizer

In CMI (electrical) mode, the CMIP/N pins are biased

and terminated off-chip. They interface to 75Ω

coaxial cable through a 1:1 wideband transformer

and coaxial RF connectors. Reference application

notes for schematic and layout guidelines.

An optional fixed LVPECL equalizer is integrated in

the transmit path for architectures that use LIUs on

active interface cards. The fixed equalizer can

compensate for up to 1.5m of trace and can be

enabled by the TXOUT1 pin or TXEQ bit as follows:

The transmitter encodes the data using CMI line

coding and shapes an analog signal to meet the

appropriate ITU-T G.703 template. The CMI outputs

are tri-stated during transmit disable and transmit

power-down for redundancy applications.

TXEQ bit

Tx Equalizer

TXOUT1 pin

Low

Float

Enabled

Disabled

Transmit Loss of Lock

In transmit modes using the integrated CDR, the

78P2351 will declare a loss of lock condition when

there is no valid signal detected at the SIDP/N data

inputs.

Note: To avoid reflections causing unwanted

board noise, it’s recommended to power-down

unused transmit ports that are not terminated

with cable to an Rx input port.

Note: The Tx LOL indicator is invalid and

undefined when the parallel (nibble) interface is

selected.

When the CMI pin is low, the chip is in Fiber (NRZ

pass-through) mode and interfaces directly to an

optical transceiver module. The ECLP/N pins are

internally biased and output NRZ data at LVPECL

levels. The CMI driver, encoder and decoder are

disabled in Fiber (NRZ) mode.

POWER-DOWN FUNCTION

Power-down control is provided to allow the

78P2351 to be shut off. Transmit and receive

power-down can be set independently through SW

Transmit Monitor Mode

An optional redundant transmit output is available in

CMI mode for transmit monitoring. These outputs

(CMI2P/N) are enabled when the RCSL pin or RCSL

control.

Global power-down is achieved by

powering down both the transmitter and receiver.

Note: The serial interface and configuration

registers are not affected by power-down.

CMI

Coax

CMI2P/N

XFMR

In HW mode, the transmitters can be powered down

using the TXPD control pin.

CMI

Coax

CMIP/N

XFMR

TDK

78P2351

CMI

Coax

RXP/N

XFMR

Figure 6: Transmit Monitor Output

Clock Synthesizer

The transmit clock synthesizer is a low-jitter DLL that

generates a 278.528/311.04 MHz clock for the CMI

encoder. It is also used in both the receive and

transmit sides for clock and data recovery.

Note: This 2x line rate clock is also available at

the

TXCKxP/N

pins

for

downstream

synchronization or system debug.

Page: 7 of 42

2006 Teridian Semiconductor Corporation

Rev. 2.4

1...4 5 678 9 10...42

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与78P2351-IGT/F相关器件

型号	品牌	描述	获取价格	数据表
78P2351-IGTR	TERIDIAN	Single Channel OC-3/ STM1-E/ E4 LIU	获取价格
78P2351-IGTR/F	MAXIM	Transceiver, 1-Func, CMOS, PQFP100, LEAD FREE, LQFP-100	获取价格
78P2351R	TERIDIAN	Serial 155M NRZ to CMI Converter	获取价格
78P2351R-IM	TERIDIAN	Serial 155M NRZ to CMI Converter	获取价格
78P2351R-IM/A04	TERIDIAN	Telecom IC,	获取价格
78P2351R-IM/A04R	TERIDIAN	Telecom IC,	获取价格

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