78P2341JAT
E3/DS3/STS-1 LIU
with Jitter Attenuator
LOOPBACK MODES
A third loopback mode is also available when using
the serial control interface. Local (Digital) Loopback
mode is controlled by the Jitter Attenuator Control
Register and only passes through the Jitter
Attenuator, bypassing all Analog blocks in the IC.
The LPBK pin is used to activate common loopback
modes as shown in the table below. The LLBK and
RLBK bits in the Mode Control Register can also
control these modes when the Register Control bit,
REGEN, is enabled.
Local (Digital) Loopback
LPBK
Controls Flags
RLBK
LBO E3 DS3
Transmit
Monitor
Loopback Mode
TXNW
TXEN
pin
TPOS
TNEG
B3ZS
HDB3
/
LOUTP
LOUTN
Pulse
Shaper
Encoder
TCLK
Local (Analog) Loopback
Attenuator
Jitter
Attenuator
ENDEC
L
Same as LLBK = ‘1’
RPOS
B3ZS
HDB3
/
Data
Adaptive
Equalizer
LINP
LINN
RNEG
RCLK
AGC
Detector
Decoder
Remote (Digital) Loopback
Z
MON
TCLKP
RCLKP
Power
Distribution
Signal
Detector
Clock
Recovery
LOS
Same as RLBK = ‘1’
LLBK
PDTX PDRX
Normal Operation
H
CKREF
Same as LLBK, RLBK = ‘0’
Master
Bias
Generator
SCK
SDIO
Control
Registers
CKREF
When in Local (Analog) Loopback, the transmit
output signals, LOUTP,N are internally routed to the
receiver inputs. Any incoming signals on LINP,N will
be ignored when in Local Loopback. For proper
operation in this mode, the transmitter needs to be
properly terminated with no hanging cables.
B3ZS/HDB3 ENDEC WITH LINE CODE VIOLATION
DETECT
The 78P2341JAT includes a selectable B3ZS/HDB3
Encoder/Decoder (ENDEC). When the ENDEC pin
is low, the ENDEC is selected and the decoder
generates a composite NRZ logic data stream
following the B3ZS (for DS3/STS-1) or HDB3 (for E3)
substitution codes via the RPOS pin as shown
below.
Local (Analog) Loopback
Tx JAT Off
Controls Flags
RLBK
LBO E3 DS3
Transmit
Monitor
TXNW
TXEN
TPOS
TNEG
TCLK
Tx JAT On
B3ZS
HDB3
/
LOUTP
LOUTN
Pulse
Shaper
Encoder
Attenuator
Jitter
Attenuator
ENDEC
RPOS
B3ZS
HDB3
/
Data
Detector
Adaptive
Equalizer
LINP
LINN
RNEG
RCLK
AGC
Decoder
ENDEC
RPOS
RNEG
Rx JAT On
Rx JAT Off
MON
TCLKP
RCLKP
Power
Signal
Detector
Clock
Recovery
LOS
Distribution
LLBK
1
Positive AMI
Negative AMI
PDTX PDRX
CKREF
Master
Bias
Generator
Receive Line Code
Violation Indicator
SCK
SDIO
Control
Registers
CKREF
0
NRZ data
When in Remote (Digital) Loopback, the received
signals and clock data, RPOS/RNEG/RCLK, are
internally routed to the transmitter input signals. Any
incoming data on TPOS, TNEG, or TCLK will be
ignored when in Remote Loopback.
The decoder also detects Receive Line Code
Violations (RLCV) and outputs a pulse via the
RNEG pin. Three different classes of line code
violations are detected.
Remote (Digital) Loopback
•
Too many zeros: More than two (three)
consecutive zeros in B3ZS (HDB3) mode.
Controls Flags
RLBK
LBO E3 DS3
Transmit
Monitor
TXNW
TXEN
TPOS
TNEG
TCLK
B3ZS
/
LOUTP
LOUTN
Pulse
•
Not enough zeros between bipolar pulse (B) and
bipolar violation pulse (V): (B,V) for B3ZS.
(B,V) or (B,0,V) for HDB3.
HDB3
Shaper
Encoder
Attenuator
Jitter
ENDEC
Attenuator
RPOS
B3ZS
HDB3
/
Data
Detector
Adaptive
Equalizer
LINP
LINN
RNEG
RCLK
AGC
Decoder
MON
•
Code violation: Even number of bipolar pulses (B)
detected between bipolar violation pulses (V).
TCLKP
RCLKP
Power
Signal
Clock
Recovery
LOS
Distribution
Detector
LLBK
PDTX PDRX
CKREF
Master
Bias
Generator
SCK
SDIO
Control
Registers
CKREF
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