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7809LPRPFK PDF预览

7809LPRPFK

更新时间: 2024-02-25 10:47:33
品牌 Logo 应用领域
麦斯威 - MAXWELL 转换器模数转换器
页数 文件大小 规格书
23页 463K
描述
16-Bit Latchup Protected Analog to Digital Converter

7809LPRPFK 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:QFF, FL24,.4针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.66
Is Samacsys:N最大模拟输入电压:10 V
最小模拟输入电压:-10 V最长转换时间:8 µs
转换器类型:ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码:R-XDFP-F24
长度:15.1384 mm最大线性误差 (EL):0.0046%
模拟输入通道数量:3位数:16
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出位码:BINARY, 2'S COMPLEMENT BINARY输出格式:SERIAL
封装主体材料:UNSPECIFIED封装代码:QFF
封装等效代码:FL24,.4封装形状:RECTANGULAR
封装形式:FLATPACK电源:5 V
认证状态:Not Qualified采样速率:0.1 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:7.6708 mm
子类别:Analog to Digital Converters标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
总剂量:100k Rad(Si) V宽度:10.16 mm
Base Number Matches:1

7809LPRPFK 数据手册

 浏览型号7809LPRPFK的Datasheet PDF文件第14页浏览型号7809LPRPFK的Datasheet PDF文件第15页浏览型号7809LPRPFK的Datasheet PDF文件第16页浏览型号7809LPRPFK的Datasheet PDF文件第18页浏览型号7809LPRPFK的Datasheet PDF文件第19页浏览型号7809LPRPFK的Datasheet PDF文件第20页 
16-Bit Latchup Protected Analog to Digital Converter  
7809LP  
Testing the 7809LPRP Latchup Protection Circuitry  
The LPVANA and LPVDIG pins provide direct access to the 7809LP converter supply pins for attaching external  
decoupling capacitors to ground. These pins can also be used to test the LPTTM operation and threshold level by sink-  
ing a pulsed current load to ground as shown in the test circuit in Figure 8. The most accurate threshold current mea-  
surements are made with the ADS7809 in its lowest power state (PWRD = 5V).  
The LPTTM operation and device recovery times are most easily measured using the LPBIT input to trigger protection  
and recovery. Applying a 10 µsec high duration TTL level to the LPBIT pin causes internal test currents sufficient to  
trigger the LPTTM circuit to be drawn through both the analog and digital supply sense circuits.  
LPTTM operating characteristics are summarized in Table 16 according to the timing diagram shown in Figure 9. Dur-  
ing the time that the power is cycled, output signals and data from the 7809LP are invalid. The LPSTATUS signal high  
indicates that power is removed from the ADS7809 die. When this signal is low, power is applied to the ADS7809 die.  
The LPSTATUS signal is used to measure the supply recovery time. The supply recovery time interval starts when the  
supply current rises (causing LPSTATUS to go high) and ends when the LPSTATUS signal stabilizes low again.  
Within the functional recovery time interval (~25 µsec after the LPTTM circuit reapplies power), the normal functional  
operation of the converter is restored with less than 5% full scale error. Additional settling time is then required to  
return to full accuracy operation. Recovery time intervals are defined which indicate the time to recover first to within 8  
bit accuracy, then to within 12 bit accuracy, and finally to full 16 bit accuracy. These recovery times are primarily due to  
the single event and power cycling effects on the reference circuits and the settling times of their respective filter  
capacitors.  
TABLE 16. 7809LP LPTTM OPERATING CHARACTERISTICS  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
Supply Threshold Current  
Protection Time  
ITHR  
TPT  
PWRD = 5V  
75  
mA  
µsec  
µsec  
µsec  
µsec  
msec  
LPBIT = 2.4V for 5 µs  
LPBIT = 2.4V for 5 µs  
LPBIT = 2.4V for 5 µs  
LPBIT = 2.4V for 5 µs  
LPBIT = 2.4V for 5 µs  
10  
Supply Recovery Time  
TSR  
TFR  
T8R  
50  
Functional Recovery Time  
8-bit Accuracy Recovery Time  
Full Accuracy Recovery Time  
TSR + 25  
80  
5
TFAR  
01.11.05 Rev 7  
All data sheets are subject to change without notice 17  
©2005 Maxwell Technologies  
All rights reserved.  

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