Datasheet > 767143224FPSP

767143224FPSP

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
西迪斯 - CTS		/
页数	文件大小	规格书
5页	142K
描述
Leaded Surface Mount

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中文翻译

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数据手册

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767143224FPSP 数据手册

Types of Circuits

Bussed (Schematic 1)

Isolated (Schematic 3)

Dual Terminator (Schematic 5)

R/2R Ladder (Schematic 7)

A DIM.

+.050

-.030

.200

.008 ^+.002

-.001

"A" Dimension

No. of Pins

.810 ^+.330

-.300

7.620

.300

5.590 ^+.130

-.250

in.

PART NO.

DATE CODE

+.005

.220

.032^+.013

-.010

-.012

9.91 ±0.25

11.18 ±0.25

Notes

0.390 ±0.010

0.440 ±0.010

MODULES WILL BE

MARKED WITH A SQUARE

AT PIN #1 (TOP MARKING)

0°- 8°

BELOW

SEATING

PLANE

INSULATION COATING

APPLIED ON TWO SURFACES

mm 0.10 MAX

in. 0.004

1.350

.053

1. Lead COPLANARITY

General Tolerances

MAX. TYP.

2.160±.200

.085±.008

.760±.130

.030±.005

mm ±0.25

in. ±0.010

NOTE #1

.430±.050

.017±.002

1.270

.050

TYP.

mm & in. DIMENSIONS ARE NOT EQUIVALENT

Land Patterns

LEAD COUNT

in.

5.34

0.21

5.34

0.21

7.37

0.29

7.37

0.29

9.40

0.37

9.40

0.37

7.60

0.30

8.90

0.35

14P

16P

0.63

.025

in.

TYP.

1.27

.050

2.03

.080

TYP.

Page 2 of 5

January 2008

CTS Electronic Components

Leaded Surface Mount 767 Series

www.ctscorp.com

123 4 5

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