Datasheet > 74LVC3GU04GS

74LVC3GU04GS

更新时间： 2024-10-01 08:36:55

品牌	Logo	应用领域
恩智浦 - NXP		输入元件光电二极管
页数	文件大小	规格书
22页	444K
描述
LVC/LCX/Z SERIES, TRIPLE 1-INPUT INVERT GATE, PDSO8, 1.35 X 1 MM, 0.35 MM HEIGHT, SOT1203, SON-8

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74LVC3GU04GS 数据手册

74LVC3GU04

Triple inverter

Rev. 8 — 10 November 2010

Product data sheet

1. General description

The 74LVC3GU04 provides three inverters. Each inverter is a single stage with

unbuffered output.

Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of

these devices in a mixed 3.3 V and 5 V environment.

2. Features and benefits

Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant input/output for interfacing with 5 V logic

High noise immunity

ESD protection:

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

±24 mA output drive at V_CC= 3.0 V

CMOS low power consumption

Latch-up performance exceeds 250 mA

Multiple package options

Specified from −40 °C to +85 °C and from −40 °C to +125 °C.

3. Ordering information

Table 1.

Ordering information

Package

Temperature range Name

Type number

Description

Version

74LVC3GU04DP −40 °C to +125 °C

74LVC3GU04DC −40 °C to +125 °C

74LVC3GU04GT −40 °C to +125 °C

74LVC3GU04GF −40 °C to +125 °C

74LVC3GU04GD −40 °C to +125 °C

TSSOP8 plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

VSSOP8 plastic very thin shrink small outline package; 8 leads;

body width 2.3 mm

SOT765-1

SOT833-1

SOT1089

SOT996-2

XSON8

plastic extremely thin small outline package; no leads;

8 terminals; body 1 × 1.95 × 0.5 mm

XSON8

extremely thin small outline package; no leads;

8 terminals; body 1.35 × 1 × 0.5 mm

XSON8U plastic extremely thin small outline package; no leads;

8 terminals; UTLP based; body 3 × 2 × 0.5 mm

12 3 4 5 6 7...22

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