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74LVC4066PW-Q100 PDF预览

74LVC4066PW-Q100

更新时间: 2024-10-01 02:56:59
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
23页 777K
描述
Quad bilateral switch

74LVC4066PW-Q100 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.6
湿度敏感等级:1峰值回流温度(摄氏度):260
处于峰值回流温度下的最长时间:30Base Number Matches:1

74LVC4066PW-Q100 数据手册

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74LVC4066-Q100  
Quad bilateral switch  
Rev. 1 — 7 August 2012  
Product data sheet  
1. General description  
The 74LVC4066-Q100 is a high-speed Si-gate CMOS device.  
The 74LVC4066-Q100 provides four single pole, single-throw analog switch functions.  
Each switch has two input/output terminals (nY and nZ) and an active HIGH enable input  
(nE). When nE is LOW, the analog switch is turned off.  
Schmitt-trigger action at the enable inputs makes the circuit tolerant of slower input rise  
and fall times across the entire VCC range from 1.65 V to 5.5 V.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Wide supply voltage range from 1.65 V to 5.5 V  
Very low ON resistance:  
7.5 (typical) at VCC = 2.7 V  
6.5 (typical) at VCC = 3.3 V  
6 (typical) at VCC = 5 V  
Switch current capability of 32 mA  
High noise immunity  
CMOS low-power consumption  
Direct interface TTL-levels  
Latch-up performance exceeds 250 mA  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Enable inputs accept voltages up to 5 V  
Multiple package options  

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