Datasheet > 74LVC32ABQ

74LVC32ABQ

更新时间： 2023-09-03 20:29:03

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
13页	231K
描述
Quad 2-input OR gateProduction

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74LVC32ABQ 数据手册

74LVC32A

Quad 2-input OR gate

Rev. 8 — 27 August 2021

Product data sheet

1. General description

The 74LVC32A is a quad 2-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

2. Features and benefits

•

Wide supply voltage range from 1.2 V to 3.6 V

•

Overvoltage tolerant inputs to 5.5 V

CMOS low power dissipation

Direct interface with TTL levels

Complies with JEDEC standard:

•

JESD8-7A (1.65 V to 1.95 V)

JESD8-5A (2.3 V to 2.7 V)

JESD8-C/JESD36 (2.7 V to 3.6 V)

•

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-B exceeds 200 V

CDM JESD22-C101E exceeds 1000 V

•

Specified from -40 °C to +85 °C and -40 °C to +125 °C

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74LVC32AD

74LVC32APW

74LVC32ABQ

-40 °C to +125 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

SOT762-1

DHVQFN14 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

12 3 4 5 6 7...13

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