5秒后页面跳转
74LS221 PDF预览

74LS221

更新时间: 2024-09-24 22:53:15
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 124K
描述
LOW POWER SCHOTTKY

74LS221 数据手册

 浏览型号74LS221的Datasheet PDF文件第2页浏览型号74LS221的Datasheet PDF文件第3页浏览型号74LS221的Datasheet PDF文件第4页浏览型号74LS221的Datasheet PDF文件第5页浏览型号74LS221的Datasheet PDF文件第6页浏览型号74LS221的Datasheet PDF文件第7页 
Each multivibrator of the LS221 features a negative-transition-  
triggered input and a positive-transition-triggered input either of  
which can be used as an inhibit input.  
http://onsemi.com  
Pulse triggering occurs at a voltage level and is not related to the  
transition time of the input pulse. Schmitt-trigger input circuitry for B  
input allows jitter-free triggering for inputs as slow as 1 volt/second,  
providing the circuit with excellent noise immunity. A high immunity  
LOW  
POWER  
SCHOTTKY  
to V noise is also provided by internal latching circuitry.  
CC  
Once triggered, the outputs are independent of further transitions of  
the inputs and are a function of the timing components. The output  
pulses can be terminated by the overriding clear. Input pulse width  
may be of any duration relative to the output pulse width. Output pulse  
width may be varied from 35 nanoseconds to a maximum of 70 s by  
choosing appropriate timing components. With R = 2.0 kand C  
= 0, a typical output pulse of 30 nanoseconds is achieved. Output rise  
and fall times are independent of pulse length.  
ext  
ext  
16  
1
Pulse width stability is achieved through internal compensation and  
PLASTIC  
N SUFFIX  
CASE 648  
is virtually independent of V and temperature. In most applications,  
CC  
pulse stability will only be limited by the accuracy of external timing  
components.  
Jitter-free operation is maintained over the full temperature and V  
CC  
ranges for greater than six decades of timing capacitance (10 pF to 10  
µF), and greater than one decade of timing resistance (2.0 to 100 kΩ  
for the SN74LS221). Pulse width is defined by the relationship:  
16  
1
t (out) = C  
R
ln 2.0 0.7 C  
R ; where t is in ns if C is in  
ext ext W ext  
w
ext ext  
pF and R is in k. If pulse cutoff is not critical, capacitance up to  
ext  
SOIC  
D SUFFIX  
CASE 751B  
1000 µF and resistance as low as 1.4 kmay be used. The range of  
jitter-free pulse widths is extended if V  
temperature.  
is 5.0 V and 25°C  
CC  
SN74LS221 is a Dual Highly Stable One-Shot  
Overriding Clear Terminates Output Pulse  
Pin Out is Identical to SN74LS123  
ORDERING INFORMATION  
GUARANTEED OPERATING RANGES  
Device  
Package  
16 Pin DIP  
16 Pin  
Shipping  
Symbol  
Parameter  
Supply Voltage  
Min  
4.75  
0
Typ  
5.0  
25  
Max  
5.25  
70  
Unit  
V
SN74LS221N  
SN74LS221D  
2000 Units/Box  
V
CC  
2500/Tape & Reel  
T
A
Operating Ambient  
Temperature Range  
°C  
I
Output Current – High  
Output Current – Low  
0.4  
8.0  
mA  
mA  
OH  
I
OL  
Semiconductor Components Industries, LLC, 1999  
1
Publication Order Number:  
December, 1999 – Rev. 6  
SN74LS221/D  

与74LS221相关器件

型号 品牌 获取价格 描述 数据表
74LS221B NXP

获取价格

IC MONOSTABLE MULTIVIBRATOR, PDIP16, Prescaler/Multivibrator
74LS221N MOTOROLA

获取价格

DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS
74LS221N ONSEMI

获取价格

LOW POWER SCHOTTKY
74LS22D TI

获取价格

LS SERIES, DUAL 4-INPUT NAND GATE, PDSO14
74LS22DC FAIRCHILD

获取价格

NAND Gate, TTL, CDIP14,
74LS22DCQM FAIRCHILD

获取价格

NAND Gate, TTL, CDIP14,
74LS22DCQR FAIRCHILD

获取价格

NAND Gate, TTL, CDIP14,
74LS22DR TI

获取价格

LS SERIES, DUAL 4-INPUT NAND GATE, PDSO14
74LS22FCQR FAIRCHILD

获取价格

NAND Gate, TTL, CDFP14,
74LS22J TI

获取价格

暂无描述